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Liquid-phase crystallised Si on-glass has emerged as a new PV material potentially capable of solar cell efficiencies comparable to that of mc-Si wafer cells. An interface between Si and glass is found to play a crucial role in realizing the efficiency potential. Transparent dielectrics, such as SiOx, SiCx, SiNx, are used as interface buffers to serve a few functions: Si wetting and adhesion; high...
In this work, we report on the feasibility and design optimization of impact ionization junctionless transistors for dynamic memory and bio-sensing applications. Optimization of snapback and the hysteresis effects in the output characteristics to achieve high current margin between the two reading states of a dynamic memory are presented. The optimized cell offers nearly 4 orders of difference in...
The present study aims to put to profit a newly developed insulating nano-alumina (Al2O3) hydrate coating technique applied to electrically conductive particles. This paper deals with the morphology of the nano-alumina hydrate coating and its impact on dielectric properties of the composite materials. For the base polymer, a bisphenol-A type epoxy resin and an alicyclic polyamine hardener were used...
Air-filled Substrate Integrated Waveguide (SIW) based on multilayer Printed Circuit Board (PCB) process is proposed in this paper for millimeter-wave applications that require low cost, high performances and compactness. This air-filled SIW allows for substantial loss reduction and power handling enhancement. Its fabrication involves three layers. The top and bottom substrates can consist of a low...
This paper reports on an industrial DHEMT process for 650V rated GaN-on-Si power devices. The MISHEMT transistors use an in-situ MOCVD grown SiN as surface passivation and gate dielectric. Excellent off-state leakage, on-state conduction and low device capacitance and dynamic Ron is obtained. Initial assessment of the intrinsic reliability data on the in-situ SiN is provided.
In this paper, the reliable SiNx/AlGaN/GaN MISHEMTs on silicon substrate with improved trap-related characteristics have been well demonstrated. The devices with our proposed treatment method showed less deep-level traps and more Si surface donors at SiNx-AlGaN interface. The trap related device characteristics are also improved by using our optimized treatment method. The devices with proposed treatment...
The conduction-type dependent thermal oxidation rate in SiC was discovered. The oxidation was performed for SiC(0001) with nitrogen doping (n-type) in the range from 2.0×1016 cm−3 to 1.0×1019 cm−3, and aluminum doping (p-type) in the range from 2.0×1015 cm−3 to 1.0×1019 cm−3, exhibiting a clear dependence. For n-type SiC the oxide thickness increases for higher doping density, and for p-type the thickness...
This paper reports the development and application of a two dimensional transient numerical model for coventional silicon solar cells for the study of the effect of positive ion deposition on the cell's surface occurring during potential-induced degradation (PID). The results obtained from the numerical model indicate the impact of the positive ion deposition on the p-n junction depletion region and...
Through-silicon via (TSV) interconnection technology is seen as a key enabling technology for stacking silicon dies and building 3D chips. In this paper, we present a novel technique to enable the modeling of through-silicon via interconnects within a 3D planar integral equation solver. The technique is capable of modeling both the dielectric isolation effects of the TSV oxide and the metal-oxide-semiconductor...
In couple of years, the CMOS devices will be scaled down to the decananometer range and the gate dielectric thickness, in the sense of oxide equivalent thickness (EOT), will be shrunk into the subnanometer scale. A higher dielectric constant material must be introduced. Lanthanum oxide or lanthana has been considered to be one of the promising next generation gate dielectric materials. However, it...
TSV CIS package technology is based on a via-last approach in association with an adapted bonding for optical applications. With the gradual increase of the CIS pixel and package integration density, CIS packaging requirements are also increasing. High aspect ratio TSV advantage is gradually reflected. The 3D stacking technology with TSV will be the future development trend of CIS package. In order...
Anisotropic Inter-Poly Dielectric (AIS IPD) has been successfully developed. It enables center SiN thickness to be thicker at Floating-Gate (FG) top and thinner at FG side. Using AIS IPD, both programming speed and program saturation threshold voltage improve without reliability degradation even if the IPD physical thickness at FG side is about 2nm thinner than conventional IPD. Therefore, AIS IPD...
This paper introduces a new encapsulated WLCSP product (eWLCS). The new product has a thin protective coating applied to all exposed silicon surfaces on the die. The applied coating protects the silicon and fragile dielectrics and prevents handling damage during dicing and assembly operations, effectively providing a durable packaged part in the form factor of a WLCSP. The manufacturing process leverages...
A novel approach to suppress the conventional Cu-TSV induced thermo-mechanical stress in 3D-LSI chip is proposed, fabricated and tested. In this approach, a thermal-chemical-vapor-deposition grown organic poly-imide based polymer is conformally deposited along the side wall of the TSV. As-grown polymer was tested for its physical properties and mechanical properties, and was also evaluated for their...
A Dual-gate graphene field effect transistor was fabricated with HfO2 and SiO2 as the back and top dielectric layers on silicon substrate, respectively. The CVD grown graphene was transferred a process by spin-coating a PMMA layer. The electrical properties of the graphene transistors were investigated. Ambipolar behavior of field effect transistor is demonstrated with the carrier mobility of the...
This paper describes the design of micro machined 2-layer structure bandpass filter design at 75–110GHz. A two-layer structure having substrate layer and circuit layer, has been designed and simulated with ground plane on the down wafer and solid substrate supporting the circuit is much stronger and much easier to be fabricated on silicon substrate compared with conventional 3-layer membrane structure...
We study a metamaterial-based optical waveguide formed by a silica-filled slot in a layered metal-dielectric slab. This geometry results in very strong confinement of a quasi-TE fundamental mode and gives smaller propagation losses than a purely metallic slot waveguide.
We measure the transmission of terahertz pulses through an intrinsic silicon waveguide, and observe a decrease in absorption at higher terahertz fields. The effect is enhanced when photocarriers are introduced by top-illuminating the waveguide.
Dielectric metamaterial layers are lossless, and exhibit relatively high transmission efficiencies (contrary to plasmonic metasurfaces). Subwavelength dielectric lenses have been developed - demonstrating beam area contraction ratio of three, and insertion losses of 11%.
In this paper, modeling and characterization of BiCMOS embedded microfluidic platform for biosensing applications is presented. The novel process integration scheme with two bonded wafers provides microchannels, accessing to the inlets and the outlets as well as the mm-wave sensor easily. The developed microfluidic platform provides very flexible size of microchannels in BiCMOS chip and it is able...
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