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The present analysis for base transit time of a modern high-speed npn bipolar transistor is done for Gaussian-doped base considering doping dependence of mobility, bandgap narrowing effect and carrier velocity saturation effect at base-collector junction using analytical process. This paper analyzes the base transit time of a Silicon-Germanium Heterojunction Bipolar Transistor (SiGe HBT) considering...
We have demonstrated sulfur monolayer doping (MLD) of In(53%)GaAs on III–V buffer/Si substrate at 300mm wafer scale and obtained sheet resistance of 303 ohms/sq with 8% uniformity. Mono-layer doping was achieved via molecular doping of sulfur and conventional annealing for dopant drive-in. Chemical reactivity, cost, environmental, safety and health aspects (all of which are crucial for high volume...
After successful fabrication of graphene, atomically thin two-dimensional (2D) materials have attracted a growing interest due to its intriguing novel properties and promising applications [1-3]. However, the intrinsic zero band gap of graphene hinders its applications in low-dimensional spintronics. Recently, few-layer black phosphorus (black phosphorene), has been successfully isolated by mechanical...
Co2FeAl0.5Si0.5 (CFAS) [1, 2], a full Heusler alloy with theoretical 100% spin polarization, has attracted great attention for its wide study in magnetic tunneling junctions and spin valves. Recently studies [1, 2, 3] have proved that B2 and L21-phase ensure the half-metallic property, while a range of 400∼600 °C annealing temperature is needed to obtain the ordered phases. High annealing temperature...
This paper proposes an equivalent circuit model of 3-D DRAM cell transistors with recess gate and saddle fin structure for the first time. The model effectively characterize the sub-threshold and off margin behavior of the scaled DRAM cell transistor by considering the parasitic sub-channel and vertical transistor components into account. TCAD simulation and experimental data have confirmed the accuracy...
Change in refractive index and corresponding change in optical properties like propagation loss, group index and dispersion in active PIN silicon waveguide with and without photonic crystal core are investigated by changing doping concentration. This investigation sets a bound on doping density which is utilized to change effective refractive index for various applications like modulation, switching,...
The impact of various crystal pulling process and silicon material parameters on the so called Voronkov criterion for “perfect” crystal pulling is revised. It is shown that thermal stress effects should be taken into account in particular for the development of the 450 mm diameter single crystal silicon pulling technology. An improved Voronkov criterion is proposed and its application illustrated...
The implementation of FINFET devices in the SRAM cell provides many benefits over that of planar bulk devices. The short channel effect, drive current and mismatch can be better controlled. Several FIN number options among PU(pull up device), PD(pull down device) and PG(pass gate device) can be selected to achieve the good read noise margin and write margin. But in highest-density SRAM cell, in order...
This work focuses on the development of integrated front side film stack containing a-p Si:H film as the emitter and ITO film as the carrier collection layer in n-type silicon heterojunction (SHJ) solar cells. Doping concentration and thickness of a-p Si:H films, and O2/Ar flow ratio of DC sputtered ITO films were varied to obtain optimal single layer properties. A combined ITO/double a-p Si:H stack...
The silicon thickness (Tsi) fluctuation monitoring on FD-SOI 28nm technology process is addressed by 2 different electrical characterization techniques. The first, capacitive, is adapted to within wafer variations and lot/wafer variations monitoring. The second, using the Idsat sensitivity to the Tsi in an addressable transistors array, allows to measure the local variations in the range of few tens...
A four-level optimization technique has been used to design a double low-high-low (DLHL) impact avalanche transit time (IMPATT) diode based on Si for 60 GHz operation. Initially the position of the charge bumps in both «- and p-epitaxial layers followed by the widths of those and the ratio of high to low doping concentrations have been varied subject to obtain the maximum large-signal DC to RF conversation...
This paper demonstrates the effect of nonlinear elasticity on the coupling between different bulk modes of silicon MEMS resonators. From experimental data, we observe that the coupling has a strong dependence on the resonant mode order, the mode shape of the coupled modes, as well as the doping type / concentration, and crystal orientation, leading to a variety of complex and potentially useful phenomena.
We propose a new non-destructive extraction method of gauge factor (GF) of nanowires (NW) for in-line monitoring of this parameter and piezoresistive material properties comparisons. Unlike destructive conventional techniques which also suffer from reproducibility issues, this method allows a direct measurement of the GF locally at the nanoscale and at the wafer level. GFs have been reliably measured...
Breakdown voltage, mean gain and excess noise factor of CMOS-compatible p-n junction silicon avalanche photodiodes are predicted using the dead space multiplication theory. Measured dark current and breakdown voltages are also reported supporting low-voltage operation.
In this work, we have studied Effect of Variations in Different Dimensions and self-heating on FinFET Output characteristics and Lattice Temperature. In the sub 26 nm regime conventional planar MOSFET scaling has been facing problems such as threshold voltage lowering, sub-threshold swing (SS) degradation, drain-induced barrier lowering (DIBL), random dopant fluctuations, leakage increase due to dielectric...
A physics-based, charge-based model for P-type Gaussian doped DG MOSFET is presented in this work. The developed model is also applicable to the investigation of the impact of channel material on the performance of p-type DG MOSFET. The reliability issues of the p-type MOSFET have also been demonstrated using both developed analytical model and simulated results. The performance degradation due to...
In this paper, we report the potential of the doping-less (DL) double gate field effect transistor (DL-DGFET), for ultra low power (ULP) subthreshold logic applications. We demonstrated that the proposed DL-DGFET do not require any doping from source to drain region and it can perform significantly better than highly doped junctionless (JL) and abrupt S/D inversion-mode (IM) DGFETs. The DL-DGFET achieves...
In this paper, we have demonstrated the performance analysis of a planar junctionless (JL) silicon-oxidenitride-oxide-silicon (SONOS) memory cell implemented on the bulk and silicon-on-insulator (SOI) substrate wafer. Both cells are simulated using extensive two dimensional device simulator and compared on the basis of improved memory characteristics. The JL SOI SONOS exhibits larger memory window...
N+ transparent conductor oxides (TCO's) can be a valuable and low-cost alternative to conventional thermally diffused emitter of silicon based solar cells. With reduced resistivities by appropriate doping and considering lattice mismatch and energy band offsets at the interface with p-silicon substrate, predictive study by numerical simulation shows comparable performance between ZnS:Al and TiO2:Nb...
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