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This study deals with decentralized and hierarchical control for electric power networks by using overlapping information. The control objective is to minimize the cost function of the load frequency control problem. The control law consists of three steps. We apply the decentralized hierarchical control methodology to large-scale electrical power networks consisting of distributed power storage and...
To reveal the functional roles of retinal and cortical neurons, responses of a visual neuronal network under natural visual environments should be investigated. In this study, we developed a real-time visual system emulator for reproducing neural activities in the retina and the visual cortex by combining a hardware retina emulator developed in the previous study and SpiNNaker chips. An interface...
In this live demonstration, we will show a real-time emulator for reproducing neural activities in the retina and the visual cortex. The emulator comprises a hardware retina emulator and SpiNNaker chips. Taking advantages of multiple parallel processing techniques, the emulator generates simulated spikes with 1 ms precision. Visitors can observe simulated neural response displayed on a personal computer...
This article describes a semi-coaxial through glass via(TGV) interposer structure for high frequency three dimensional(3D) system applications. In order to overcome impedance mismatch in high frequency transition, a semi-coaxial structure is designed. The glass is 200 μm thick and the via's diameter is 50 μm. Re-distribution layer (RDL) line to TGV transition structure is designed and simulated to...
If the trap density is 1012 cm−2, then there are only one trap in 10nm × 10nm on average. Accordingly, three-dimensional simulation that is sensitive to the movement of sole electron is indispensable for carefully investigating the reliability issues related to local traps in future nano-electron devices. As a demonstration, we investigate Random Telegraph Noise (RTN) and Trap-Assisted Tunneling (TAT)...
The impacts of FinFET channel and extension S/D region implantations on relevant device parameters such as electrostatic control and Vth mismatch (MM) are investigated. We used 3D TCAD process and device simulations to gain physical understanding and to optimize the performance/variability of bulk-FinFETs. For the first time, the full FinFET process flow simulation was performed using diffusion, activation...
Through mechanical coupling, thermal effects can lead to drift in circuits' electrical performances, as well as integrated circuits reliability issues. It is thus necessary to consider thermal, mechanical and electrical effects all together in a self-consistent manner, This work focuses on the electro-thermo-mechanical simulation of integrated circuits in the target of ICs reliability monitoring from...
Online security early warning and preventive control are important parts of self-healing for smart distribution system. The structure of security early warning and preventive control are presented in this paper. Preventive control is equivalent to a multi-stages decision problem, which is divided into three stages: regulation of output for distributed generators and reactive power compensation device,...
TSV (through silicon via) is regarded as a key technology for 2.5D and 3D electronic packaging. And the manufacturing of the through silicon interposer is very challenge and costly. In the backside process of interposer, grinding is considered as the most promising technology to control wafer's surface roughness and surface defect. In this paper, according to the grinding process, a mathematical model...
Though Silicon Vias(TSVs) are regarded as a key technology to achieve three dimensional(3D) integrated circuit(IC) functionality. Annealing a silicon device with TSVs may cause high stress and cause TSV protrusion because of high Coefficient of Thermal Expansion(CTE) between silicon substrate and TSVs. The TSV wafers could be annealed right after copper plating process, or after chemical mechanical...
The power efficient mechanism for MTC (Machine type communication) UEs in LTE-A networks is investigated in this paper. Extending paging cycle has been verified as one efficient method to reduce the power consumption for MTC UE. However, unnecessary SI( System Information) acquisition will be introduced if the extended paging cycle is larger than MP (Modification Period). Therefore, a two-MP based...
With the increasing density of transistors in advanced technology nodes, the radiation is an ongoing problem affecting the contents of memory cells. This paper presents the simulation results of radiation immunity for two different memory cell technologies: 32nm Bulk CMOS and 28nm FDSOI. The effect of Single-Event Upset (SEU) caused by the heavy ion impact with different Linear Energy Transfer characteristic...
A novel TSV structure, formed by two semi-cylinders combining with a quadrangular is proposed and analyzed in this paper. This novel structure can enhance the density of TSV array without significantly decreasing transmission performance and reducing impedance mismatch in TSV-RDL transmission line or depressing the signal crosstalk. Effects of design parameters, such as the side length of quadrangular...
With the development of the integrated circuits, there is an inevitable trend in the development of the electronics industry, that the electronic devices become much smaller in shape, and integrated with higher density within, and more and more functionality. 3D SIP (System in Package) has become the mainstream technology for the microsystem integration. Meanwhile, the through silicon via (TSV) is...
In this paper, we propose the structure of bump-less high speed channel on interposer in through-via based 2.5D or 3D integrated circuit (IC). Electrical characterization of the proposed structure is analyzed by simulation in the frequency-and time-domain. In order to discuss and analyze the electrical characteristics of the proposed structure in detail, the bump-less channel and the channel with...
Plasma immersion ion implantation from AsH3 plasma into (100) crystalline silicon was performed using the PULSION tool of Ion Beam Services. Ultra-shallow arsenic doping profiles with maximum concentrations in excess of 1×1022 cm−3 and penetration depths below 10 nm at a concentration of 1×1018 cm−3 were obtained. Two simulation models were applied to describe the observed arsenic profiles: the one...
Photoluminescence and electroluminescence of crystalline silicon is a property which has become very important for the characterization of silicon wafers and solar cells. In our contribution we give an overview on the dependencies of wafer specific parameters to the luminescence intensity. Having the possibility to quickly access these dependencies allows interpreting photoluminescence images taken...
We propose a micro-concentrated silicon heterojunction silicon (MC-SHJ) solar cell design that integrates a microlens array into the traditional heterojunction solar cell structure. Device simulation shows that the photocurrent increases in the wavelength region of 1000–1200 nm. With superb infrared light harvesting and enhanced photocurrent gain, MC-SHJ cells are promising to improve the performance...
Simulation of solar cell processing enables inexpensive and rapid process optimization. Over the last twenty years, several models describing the distribution and behavior of iron point defects and iron-silicide precipitates have been developed and incorporated into process simulations. The goal of this work is to elucidate what physics are needed to accurately describe industry-relevant as-grown...
While the services-based model of cloud computing makes more and more IT resources available to a wider range of customers, the massive amount of data in cloud platforms is becoming a target for malicious users. Previous studies show that attackers can co-locate their virtual machines (VMs) with target VMs on the same server, and obtain sensitive information from the victims using side channels. This...
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