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With continuous scaling of VLSI technology, coupling capacitance between interconnects lines need more accurate transmission line modelling, requiring the introduction of self and mutual inductances. Self and mutual inductances can cause for crosstalk noise and delay between high speeds VLSI interconnects. This paper presents an mathematical computation of crosstalk noise of ‘L’ Type RLC global interconnects...
This research paper observes dynamic crosstalk delay for different single and bundled carbon nanotube (CNT) structures. These CNT structures are implemented by using three coupled line bus architecture. HSPICE simulations are performed for different single and bundled single-walled and double-walled CNT (SWCNT and DWCNT) structures. A bundled DWCNT shows approximately 90.8% and 60.4% improvement in...
In this work, simple explicit delay and rise time expressions for uniformly distributed RLC on-chip interconnect line are derived based on Elmore's approximations. Here, an n-cell RLC ladder network with capacitive load is used. Transfer function for the n-cell RLC ladder network is obtained by using the transmission line parameter matrix for each cell. In order to deduce the transfer function, the...
In paper, the time domain waveform is approximated for calculation of delay time, peak time, settling time, damping ratio and natural frequency for a second order RLCG interconnect model. It can also be used for multiple interconnect systems but higher order systems are ignored to avoid complexity. The model is applied to a single resistance-inductance-capacitance-conductance model which can also...
In this paper, we propose models for single and coupled on-chip global interconnect lines by distributed RLGC parameters using state space approach. Models for single and coupled lines are validated by comparing with SPICE simulations. Interconnect performance metrics are obtained from the proposed models for 65 nm, 90 nm, 130 nm and 180 nm technology nodes based on PTM values. In case of coupled...
This paper proposes a wave propagation based approach to derive crosstalk and delay between two coupled RLCG interconnects in the transform domain. The increase of clock frequency into the GHz range, coupled with longer length interconnects of small cross-section and low dielectric strength, can result in cross coupling effects between on-chip interconnects. The traditional analysis of crosstalk in...
As the interconnect lines play an increasingly dominant role in determining circuit performance, the dynamic delay variation due to the switching activity of neighboring lines has to be accurately characterized. The goal of this work is to simulate the effect of inductance and routing orientation and then to investigate their effects on timing performances by considering three configurations of three...
Based on Weibull distribution, a statistical RLC model considering process variations for the efficient analysis interconnect delay is proposed. The statistical RLC model can be used for optimizations, like placement, interconnect synthesis and static timing analysis (STA). Although some delay models of interconnect have been presented, like Elmore, equivalent Elmore, D2M and WED, some of them have...
In this paper, the authors propose two modified temperature-dependent equivalent circuit models for single- and double-walled carbon nanotube (SWCNT & DWCNT) interconnects at first, and the temperature effect on crosstalk in SWCNT and DWCNT interconnects are investigated, respectively. The crosstalk-induced delay and noise of these novel interconnects are characterized numerically over a temperature...
Timing driven physical design, synthesis, and optimization tools need efficient closed-form delay models for estimating the delay associated with each net in an integrated circuit (IC) design. The total number of nets in a modern IC design has increased dramatically and exceeded millions. Therefore efficient modeling of interconnection is needed for high speed ICpsilas. This paper presents an closed-form...
This paper proposes a new approach to analyze crosstalk of coupled interconnects in the presence of process variations. The suggested method translates correlated process variations into orthogonal random variables by principle component analysis (PCA). combined with polynomial chaos expression (PCE), the technique utilizes Stochastic Collocation Method (SCM) to analyze the system response of coupled...
A novel methodology for accurate and efficient static timing analysis is presented in this paper. The methodology is based on finding a frequency domain model for the gates which allows uniform treatment of the gates and interconnects. It is shown that despite the highly nonlinear overall gate model, a frequency domain model of the gate with the model parameters, gate moments, as functions of the...
A 500 kJ compact pulsed power supply (PPS) system used for electromagnetic railgun (EMG) system has been developed to investigate the influence of electric parameters on muzzle velocity in the paper, from which the stability and reliability of the PPS system can be evaluated. The pulsed power supply system consists of ten modules, and each module is composed of a high energy density capacitor, a triggered...
For deep submicron (DSM) interconnects on-chip inductive effects are rising due to increasing clock speeds, decreasing interconnect lengths and signal rise times are the major concern for signal integrity and overall interconnect performance. Inductance causes noise in the signal waveforms, which can adversely affect the performance of the circuit and signal integrity. For global wires inductance...
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