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Graphene is a wonderful material with outstanding properties which is ideal for micro-electro-mechanical systems (MEMS) and also nano-electro-mechanical systems (NEMS) like sensors and switches including strain gauges, mass and force sensors. Graphene is single atom thick layer of graphite which consists of carbon atoms that are bonded together in a hexagonal honeycomb lattice. A way of fabricating...
In this study, the quality of grain boundaries was evaluated by measuring their strength. In order to evaluate the strength of grain boundaries quantitatively, a micro-tensile test method that can measure the strength of a grain boundary has been developed. A focused ion beam was used for making a fine columnar sample which consisted of two grains in series. The sample was jointed to a small both...
For the characterization of objects on the micro-and nanoscale scanning electron microscopy (SEM) and atomic force microscopy (AFM) are common imaging techniques. Due to the different technical approaches of both methods they provide different information about the sample so a fusion of AFM and SEM images into a single image is beneficial. As SEM and AFM images show a number of individual effects...
3D IC integration based on through silicon vias (TSVs) is expected to provide an alternative technology that can exceed the Moore' Law because of its high packaging density, short signal path, low signal delays. Via filling of conductive materials is regarded as one of the key technologies in the TSV process flow. In this paper, conductive materials such as copper was chosen to fill the TSVs due to...
In this study a comparison of structure, morphology and adsorption capacity between copper doped natural and synthetic zeolite is investigated. Synthetic zeolite A was synthesized from natural clinoptilolite as Si source and sodium aluminate as Al source. The comparative surface characterization of both copper doped natural and synthetic zeolites has been investigated by X-ray diffraction (XRD), scanning...
Ethylene Glycol (EG) has received growing attention due to its potential use as a multi-purpose chemical. Cu-based catalyst was investigated owing to its high activity in the EG production. In this paper, Cu/SiO2 catalysts were prepared by deposition-precipitation methods. The reaction performance of gas-phase hydrogenation of dimethyl oxalate (DMO) to ethylene glycol (EG) over the catalysts was evaluated...
This paper describes an experimental procedure for growing self assembled Cu nanowires on a 4° miscut Si(001) substrate with and without the native oxide layer by the e-beam evaporation method. The physical characteristics of the Cu nanowires were observed using an in situ and ex situ scanning electron microscope (SEM). The results are compared with Ag nanowires that were fabricated with the same...
Lead-free reflow soldering techniques applying AuSn as well as SnAg electroplated bumps were chosen for the evaluation of the flip-chip-bonding process for X-ray pixel detectors. Both solders can be used in pick-and-place processes with a subsequent batch reflow suitable for high-volume production. AuSn solder was selected because of its fluxless bondability, good wettability, and self-alignment process...
A process for simultaneous surface treatment, micromachining and copper deposition on silicon wafer is reported here. The process addresses three issues viz. surface treatment, micromachining to form microchannels and subsequent copper deposition into this microchannel on silicon surface simultaneously. The suggested process is based on the electrochemical spark phenomenon. At a time, in its conventional...
Porous silicon (PS) is defined as a composition of a silicon skeleton permeated by a network of pores or in other word, PS is a network of silicon nanowires and nanoholes which are formed when the crystalline silicon wafers are etched electrochemically in electrolyte solution such as hydrofluoric (HF) acid . PS shows different features in comparison to the bulk silicon such as shifting of fundamental...
The purpose of this work was to compare the mechanical and physical properties for 0.5% Niobium alloyed ductile iron (0.5% Nb-DI) with commercial ductile iron (DI) before and after austempering process. The materials for this investigation were produced by conventional CO2 sand casting process and machined to TS EN 10001 standards for tensile test and ASTM E23 for Charpy impact test. Hardness test,...
Aluminum has been widely used in integrated circuit (IC) chip interconnect As the IC feature sizes continue to shrink, the RC delay of the interconnect wire has become the main delay of the system, instead of the intrinsic gate delay. For the higher speed responsibility, the resistance of the interconnects should be reduced. Copper interconnect has become the only one option for the semiconductor...
The surfaces of optoelectronic materials such as silicon, GaAs, nitrides and oxides are known to be very difficult to bond with low melting point solders (<;300°C). Small portion of active elements (3.1~4.1wt% Ti and 0.2% Ce) added into conventional SnAg solder could improve its solderability with inorganic material surfaces. In this work, some bonding experiments using active solder containing...
Cuprous oxide(Cu2O)/rectorite nanocomposites were prepared through polyol method by using cupric acetate complex as precursor of Cu, aiming to utilize the iron species in the clay material and hydrogen peroxide derived from Cu2O to form a novel immobilized Fenton system. The obtained nanocomposites were characterized by X-ray diffraction, Scanning electron microscopy and X-ray Photoelectron Spectroscopy...
The potential for via-mid through-silicon vias (TSVs) can be considerable, since their use allows not only a reduction in interconnect length from several mm to several microns, but also a tremendous increase in bandwidth between the stacked chips. The net result is less power consumption, higher performance, increased device density within a given chip footprint, and greater potential to integrate...
Vertically aligned copper indium diselenide nanorod arrays were synthesized by electrodeposition using porous anodic alumina template supported on a tungsten/silicon substrate. Porous anodic alumina template was fabricated by anodizing aluminium film which was sputtered onto tungsten/silicon substrate. The approach employed a selective chemical etching to penetrate the barrier layer at the bottom...
The feature size reduction on IC chips following Moore's law leads to great integration challenge. Among others, the mechanical integrity of pad structures is particularly critical. However, to find suitable containment actions remain tricky, and a better knowledge and characterization of interfaces are then mandatory to face these problems. The Cross-Sectional Nanoindentation (CSN) is a novel method...
Regularly faceted copper (Cu) particles ranging from tens of nanometers to submicron were obtained by annealing Cu-Zr films on polyimide and single Si (100) substrates. XRD, TEM, SEM and EDS were used to characterize their microstructural properties. The results show that these particles are pure Cu element and single crystals with [111] preferred orientation. Systematical analysis demonstrates that...
The paper studies the effect of the adhesive mass in the cantilever beam dynamic. In this paper, this determines the adhesive mass by using the adhesive material volume. The adhesive volume estimation is the semi-sphere volume. The adhesive volume in the cantilever beam can be determined by using the SEM (Scanning Electron Microscopy, SEM). From the analysis result, this can be found that the effect...
One promising application of CNTs in microelectronics is to use vertically aligned CNT (VACNT) arrays as novel thermal interface materials (TIMs). No doubt that the vertical alignment makes the best of the extremely high longitudinal thermal conductivity of individual CNTs; however, it is the CNT/substrate interface that exerts the main restriction on phonon transport through a TIM layer. There are...
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