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This paper presents an experimental analysis of the impact of AC- and DC-type Negative Bias Temperature Instability (NBTI) stresses on the CMOS inverter DC response and robustness. The results reveal, on one side, that the inverter DC response under AC NBTI presents a parallel shift of that shown under DC NBTI. However, the AC- to DC-induced shift of the inverter logic threshold is found much less...
A low-power smart temperature-sensor has developed using a standard 0.18µm CMOS process technology. The sensor utilizes the dependency of the rising time of the output pulse of an inverter, on the drain current when triggered by a fixed frequency square wave signal. The working temperature of the proposed architecture is −40°C to +85°C with the maximum-power dissipation of 4.276µW. The occupied Si...
This paper describes CMOS time-domain temperature sensors. A principle of this type of sensors is CMOS inverter's time-delay variation with temperature. The variation, however, has nonlinearity which is a fundamental error source. Therefore, we propose a new temperature sensor that improves linearity using an injection-locked oscillator (ILO). Since the ILO has the opposite curvature of an inverter...
The purpose of this study is to design a low voltage differential amplifier circuit driven by the audio interface to realize the sensing device without external power supply. The pseudo-differential amplifier was designed using a inverter-based subtracting circuit with 0.18μm standard CMOS process. The maximum differential gain was measured as 51.4dB at 1V supply voltage, and the CMRR was 45.1dB....
In this paper, an experimental investigation of negative bias temperature instability (NBTI) impact on CMOS inverter circuit is presented. The study focuses on the contribution of NBTI induced PMOS Vth shift on the degradation of the circuit DC features. This investigation was conducted in order to understand the origin of performance shifts due to NBTI at the circuit level and to properly predict...
Drastic efforts have been realized these last years in order to develop comple mentary organic technology. This is the essential key to produce elementary low cost circuits for digital and analog applications. Different techniques are available nowadays to obtain both Nand/or P-type organic devices. Screen printing is one of the most highly awaited low-cost techniques that can be used to produce organic...
We present the first sensor network architecture to monitor integrated circuits (IC) thermal and energy activity. The sensor network consists of a set of simple gates, which are superimposed over the actual design of any IC. The sensing network and the actual IC design are completely disjoint in order to enable their simultaneous operation. Since the delay of gates is proportional to their temperature,...
This paper presents an all-digital process variability monitor which utilizes a simple buffer ring with a pulse counter. The proposed circuit monitors the process variability according to a count number of a single pulse which propagates on the buffer ring and a fixed logic level after the pulse vanishes. The proposed circuit has been fabricated in 65nm CMOS process and the measurement results demonstrate...
An SOI(silicon on insulator) CMOS RO(ring oscillator) with EM(enhanced mode) NMOSFET and AM(accumulative mode) PMOSFET assembly was studied at high temperatures. The temperature dependency of its frequency was deduced, experimentally measured and fitted with polynomial. It was proved that its frequency decrease faster below 473 K and is not less than 7.75 MHz even at 573 K. The temperature dependency...
Combinational logic soft errors are expected to be the dominant reliability issue for advanced technologies. One of the major factors affecting the soft-error rates is single-event transient (SET) pulse widths. The SET pulse widths, which are controlled by drift, diffusion, and parasitic bipolar transistor parameters, are a strong function of operating temperature. In this work, heavy-ion induced...
Microprocessors increasingly need on-chip temperature sensors for thermal and power management. Since these sensors do not take part in the main computing activity but rather play the auxiliary, albeit important, role of temperature monitoring, their presence in terms of area, power, and design effort should be minimal, thus, all-digital sensors are desired. Temperature sensing based on temperature-dependent...
A CMOS 90 nm physical unclonable function (PUF) based on analog signal processing and process variability has been realized, resistant to a brute force attack of more than 1025 trials. Experimental measurements show that the circuit exhibits 38 µW power consumption. Process and temperature monitor and compensator keep the experimental BER below 0.1% at 125°C or with a 10% VDD variation, with excellent...
An unclonable system for product authentication in anti-counterfeiting has been implemented in standard 90 nm CMOS technology. The circuit exploits the intrinsic variability of the electrical characteristics of minimum size MOSFETs, in order to generate a physical one-way function that univocally identifies each particular IC. Effects of temperature, voltage supply and process variations have been...
As mainstream processing technology advances into 65 nm and beyond, many factors that were previously considered secondary or insignificant, can now have an impact on chip timing. One of these factor is inversed temperature dependence (ITD). As supply voltage continues scaling into sub-IV territory, delay-temperature relationship can be reversed on some cells, meaning that device switching time may...
Class D amplifiers are becoming the most feasible solution for embedded audio application. However, distortions due to the non-linear nature of switching stage are the main drawback for this amplifier topology. This paper discusses the design and implementation of high fidelity audio class D using sliding mode control scheme. This design method proves to be a cost effective solution for industrial...
This paper reports on the design and implementation of a low-voltage, low-power Wake-Up circuit consisting on a Power-on-Reset module and a clock generator. No external components are used neither for the Power-on- Reset nor for the clock generation. The clock generator module is temperature compensated by applying a current limiting technique. The Wake-Up circuit has been fabricated in a 130 nm ultra-low...
In deep submicron era, to prevent larger amount of SRAM from more frequently encountered overheating problems and react accordingly for each possible hotspots, multiple ideal run-time temperature sensors must be closely located and response rapidly to secure system reliability while maintaining core frequency. This paper presented a method to extract run-time temperature information from multiple...
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