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Reliability evaluation of Commercial off-the-shelf (COTS) processors against faults induced by radiation is a challenging problem. Some alternatives have been proposed to radiation test but they are very time consuming and lack of the observability needed. This work analyses the possibility to use an HDL model for estimating applications dependability on Texas Instruments MSP430 processor early in...
Most modern FPGAs have very optimised carry logic for efficient implementations of ripple carry adders (RCA). Some FPGAs also have a six input look up table (LUT) per cell, whereof two inputs are used during normal addition. In this paper we present an architecture that compresses the carry chain length to N/2 in recent Xilinx FPGA, by utilising the LUTs better. This carry compression was implemented...
This paper presents the design and implementation of a 64-bit VLIW microprocessor. It discusses the concept, traits, principle and structure of this 64-bit VLIW microprocessor to facilitate its design. This paper first discusses the architectural specifications of the microprocessor and the 16 kinds of operational functions it facilitates. It then examines the implementation of the whole VLIW microprocessor...
This paper design an embedded controller module based on ARM according to the VME bus specification to meet the increase of VME controller performance, interface optimization and the increasing demand of hardware and software compatibility. Hardware-wise, we design the peripheral circuit for ATSAMA5D3 microprocessor, achieve a network port, USB port and other external interfaces, and use the FPGA...
This document describes the application of project-based learning techniques through the development of an application-specific multiprocessor digital system with hardware/software codesign, as the final project for an optional course of the Grado en Ingeniería Electrónica y Automática at Universidad de Extremadura. The design uses a processor specifically designed for the task, and another configurable...
Recently proposed Digital Silicon Photo-Multipliers integrate arrays of Time-to-Digital Converters thus providing multiple photon timestamps for each detected gamma. A considerable amount of data is generated and has to be processed to estimate the actual time of arrival of the gamma. This is typically performed on the FPGA present on the controller board. The processing stages include: (i) back conversion...
Soft-core processor's implemented on an FPGA are now days becoming very economical. These can be customized according to special needs and demands. Customization according to the application can be done using soft-core's. But there exists a lot of overhead in reimplementing and downloading the core again to the FPGA, if in case any changes are required in the code. Hence a new technique to overcome...
This paper presents an innovative implementation of smart sensor, based on multi-processor technology that can be used in industrial, automation, medical applications or in live assisted applications. This model of sensor offers some advantages like parallel processing, flexible structure and short time and low cost of implementation.
Complex dynamical systems establish offer entirely new possibilities to the development of groundbreaking data processing methods. In the domains of image and video processing, locally coupled cellular array computers, based on Cellular Nonlinear Networks (CNN), accelerate the computation of large amounts of data in real-time, due to their inherent concept of massive parallelism. Current VLSI implementations...
This paper presents a non-intrusive hybrid fault detection approach that combines hardware and software techniques to detect transient faults in microprocessors. Such faults have a major influence in microprocessor systems, affecting both data and control flow. In order to protect the system, an application-oriented hardware module is automatically generated and reconfigured on the system during runtime...
This paper remarks the importance of defining real conditions for the radiation effects evaluation on embedded systems using a fault injection system. The influence of fault latency on the experiment results is illustrated by means of a case study.
Large digital integrated circuits designed to solve space applications, have to be designed following standards that recommend to include hardening techniques against Single Event Phenomena caused by harsh radiation environments. It is specifically important in the case of modern deep-submicron technologies. Single Event Effects are phenomena related to the effects of radiation when ionizing particles...
Hardware virtualization is a well known technique in processor based hardware architectures for abstraction of the complexity of an underlying hardware from the programmer. Not only processor based hardware, especially Field Programmable Gate Arrays (FPGA), comes with a high complexity and the exploitation for developers suffer from this fact. Each change in the hardware e.g. through an introduction...
The Computer Architecture and Organization course in Computer and Electrical Engineering departments faces with a big problem: the migration from theory to practice. In order to solve this problem, a Computer Architecture simulator named BZK.SAU[1] is designed using an emulator program for educational purpose. This approach has important limitations. While students can complete and simulate their...
The Instruction Set Architecure (ISA) of micro-processors is usually word oriented, so it is not optimized to perform bit level operations. A functional unit oriented to the bit manipulation could accelerate the computation increasing the microprocessor performance in terms of execution time. This work presents the experimental results of the integration between the Bit Manipulation Unit (BMU) described...
Asynchronous circuits possibly have several potential advantages in comparison with synchronous one. In this paper, we attempt to introduce asynchronous circuit design method into the control unit of our 8-bit microprocessor by the burst-mode design method and implemented the asynchronous 8-bit microprocessor with outputs to observe all registers and the program counter by using a standard FPGA development...
Technological advances of Field Programmable Gate Array (FPGA) are making that this technology becomes the most preferred platform for the rapid prototyping of highly integrated digital systems. In addition, protection of processor-based systems to mitigate the harmful effects of radiation-induced upset events is gaining importance while technology shrinks. In this context, the main contribution of...
Rapid HDL is an object oriented software library for scripting the generation of synthesizable Verilog. A fully functional customized microprocessor is defined and automatically synthesized for an FPGA from an XML specification file. Using a library of blocks, a microprocessor fabric is defined in XML. Control states specify the connections between the fabric blocks during microprocessor operation...
The coupling architecture containing an FPGA device and a microprocessor has been widely used to accelerate microprocessor execution. Therefore, there have been intensive researches about synthesizing high-level programming languages (HLL) such as C and C++ into HW in the high-level synthesis community in order to make the work of reconfiguring the FPGA easier. However, the difference in a calling...
Modern FPGA chips, with their larger memory capacity and reconfigurability potential, are opening new frontiers in rapid prototyping of embedded systems. With the advent of high density FPGAs it is now possible to implement a high performance VLIW processor core in an FPGA. Architecture based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance...
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