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Recently, studies have matured of field programmable gate arrays (FPGAs) that realize hardware acceleration. For such hardware acceleration on FPGAs, hugely parallel computation is frequently used. Consequently, numerous identical circuits are implemented onto an FPGA. However, identical configuration contexts of numerous identical circuits are stored on different regions of the configuration memory...
In urban areas, WiFi is the most widely-deployed portal for users to acquire the broadband access. Meanwhile, phishing AP (access point)-a rogue AP that falsifies the SSID (or even the BSSID) of a legitimate corporate AP-has caused many security problems in commodity WiFi networks. Existing research on the phishing AP detection can be divided into two categories: (1) the hardware-based approach usually...
Approximate computing is an emerging paradigm to improve the efficiency of computing systems by leveraging the intrinsic resilience of applications to their computations being executed in an approximate manner. Prior efforts on approximate hardware design have largely focused on circuit-level techniques. We propose a new approach, clock overgating, for the design of approximate circuits at the Register...
Recently, to realize autonomous functions resembling those of humans on space systems, higher-performance embedded systems than those of current space systems are necessary for use in long-distance space missions. Currently, a parallel-operation-oriented optically reconfigurable gate array (ORGA) has been under development. The ORGA can support a nanosecond-order high-speed reconfiguration and high-density...
Recently, high-speed space optical communication requires real-time hardware operation instead of slow software operation on a processor. For such purposes, field programmable gate arrays (FPGAs) are extremely useful. In such hardware accelerations, a software algorithm is frequently implemented onto an FPGA as a parallel operation. However, in such implementations, many regions of the configuration...
Dedicated electronic hardware has been used to interpret selected lessons in fuzzy mathematics. DeMorgans Laws were simulated in an electronic environment and that simulation was then used as a base to illustrate how the law of excluded middle is violated by fuzzy sets. In that context the problem of fuzzy grade of inclusion is briefly analysed and simulated electronically.
Based on the power consumption analysis of a real dynamically reconfigurable processor array (DRPA) prototype MuCCRA-3, it appears that the key of power saving is keeping the datapath on the processing element (PE) array as possible. Fine grain partial reconfiguration (FGPR) is a simple technique to minimize the change of configuration code in a hardware context switching. In FGPR, a configuration...
Reconfigurable hardware is an effective design option to cope with the increasing demands of simultaneous flexibility and computation power in system design. This paper explores techniques to combine the two entropy decoding methods, context-based adaptive binary arithmetic coding (CABAC) and context-based adaptive variable length coding (CAVLC), defined in the H.264 standard using the coarse-grain...
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