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Ensuring reliability of interfaces of dissimilar materials is one of the most critical design aspects of electronic assemblies. A study on the interface delamination phenomenon of different power packages was undertaken. Thermally induced stresses caused by the thermal mismatch between molding compound (MC), Si-die, and Cu- heatsink act as combined shear and normal loadings on the respective interfaces...
With the quick development of electronic products, IC chip with more functionalities, higher performance, miniaturization, higher reliability and lower cost have been requested intensely, especially in portable device domain such as cell phone, camera, notebook. Based on that, the electrical product using CSP series such as WLCSP, TFBGA, QFN etc. need further evaluation to meet those requirements.
Mechanical reliability of epoxy molding compounds in plastic packages of integrated circuits (IC) is greatly affected by the compound ability to absorb moisture. In this paper, the hygro-thermal effect of a 2-layer stacked die package was investigated which emphasized on the hygroscopic stress and thermal mismatch stress. By finite element analysis (FEA), the distribution of moisture diffusion, thermo-mechanical...
Mechanical simulation and modeling play increasingly important roles in semiconductor industry. It provides guidelines on material selection, package geometry configuration, and package platform selection. It also provides insights and predictions on package reliability and failure mechanisms. Many mechanical models on reliability and failure issues aim directly at observed failures, such as solder...
The assemblies “PoP” (Package-on-Package) can significantly increase the integration density of microelectronic circuits and systems, by vertically combining discrete semiconductor elements. Related to reliability especially migration phenomena, which are investigated here by simulation and measurements, become more important as the dimension of bumps decreases. To explore the influence of migration...
Wafer level packaging is an important development trend for IC package design. The fan-out wafer level package discussed here has the flip chip form which uses thin-film redistribute then uses solder bump to connect the package to the printed wiring board directly. Liquid compound was used for the encapsulation process. Comparing with wire-bond BGA, the fan-out wafer level package has better electric...
The increased functionality of cellular phones and handheld devices requires system level integration. Thus there is a strong demand in cell phone maker to move to embedded micro wafer level packaging (EMWLP). But the major problem encountered is die shift during compression molding. This paper presents a novel method to predict the die shift during wafer level molding process. A series of parametric...
Commercial FEM software codes do not directly support the cure dependency of polymers behavior. In electronics packaging, for example, cure shrinkage of the molding compound is consequently treated as a surplus to thermal contraction and its changes in visco-elastic behavior during curing are usually ignored. This give rise to inaccurate results and may cause difficulties even in recognizing factors...
The paper focuses on influence of materials properties and molding processes parameters on warpage of bimaterial silicon-molding compound (MC) systems. The three different MCs of different glass transition temperature Tg and different coefficients of thermal expansion (CTE) were considered in numerical and experimental investigation. The post molding processes and their influence on warpage were analyzed...
This paper presents a piezo-driven compliant stage implemented by the prismatic-prismatic (PP) compliant joint chains which accomplish a 4-PP compliant guide mechanism for two-DOF translations. The compliant joints consist of circular notch hinges. The 4-PP compliant guide mechanism is driven directly by two stack-type piezoelectric elements. Through design and analysis, the compliant guide mechanism...
Moisture sensitivity level (MSL) test is the well-known industrial standard to classify the level of moisture sensitivity of plastic packages. However, except for the classification, MSL test provides no suggestion for improving package MSL performance from the package design point of view. In order to achieve an expected MSL performance, further investigation of the correlation between package MSL...
Mold compound, substrate core, solder resist, underfill and die attach materials have been used for semiconductor packages for a long time. Recently, 3D packages (such as package-on-packages, stacked-die-packages) were introduced in the electronics industry. Moreover, pursing ultimate performance requires package body downsizing more and more. 3D packages are achieved by stacking laminate substrate...
It is well-known that high thermal stresses induced interfacial delamination is a typical failure mode in multi-layered micro-electronic components. Therefore, it is a key factor in package design to minimize interfacial stresses to enhance package reliability. In this paper, two designs of TAPP with different die attach pastes were manufactured. It was found that some test vehicles had cracks near...
We consider causally estimating (filtering) the components of a noise-corrupted sequence relative to a reference class of filters. The noiseless sequence to be filtered is designed by a ldquowell-informed antagonist,rdquo meaning it may evolve according to an arbitrary law, unknown to the filter, based on past noiseless and noisy sequence components. We show that this setting is more challenging than...
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