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The following topics were dealt with: advanced packaging; thermal design; mechanical design; signal and power integrity; flip chip and interconnection; advanced material; embedded device; integrated passive device; and 3-D packaging.
The latest packaging trend of three dimensional system in package (3D-SiP), based either on direct 3D silicon IC stacking or on the use of silicon or organic interposers, is placed in the context of the historical trend toward smaller, faster, and cheaper electronic systems. It can be shown that virtually all packaging advances have been directed toward the reduction of total system interconnect length,...
Assembly of electronic components on rigid and/or flexible printed circuit boards is today the customary way to fabricate electronic systems in stationary, mobile and automotive applications. On the other hand, many of the demands from emerging application fields like wearable and textile electronics cannot be met if with standard technologies. These fields have therefore become mayor drivers for...
The performance increase of computing systems is hindered by the power dissipated by the system. Multi-core systems enable the performance increase under such power-constrained environment with high-level interconnection of power-efficient processing elements. High-density and high-bandwidth interconnects are crucial for such systems, and optical interconnects promise to provide the required features,...
The most important factor associated with cracking phenomenon during reflow soldering and molding are delamination at the interface of component material of packages. Copper has been widely used as substrate and leadframe as it has good thermal performance. However, Copper surface exposed to environment leading to weak interface bond with polymeric adhesive and encapsulant. Black oxide is a conversion...
Estimating junction temperature (Tj) of the die encapsulated in a plastic package becomes critical especially in early stage of electronic product development. Confirming the surface temperature (Tc) of LSI packages by measurement is allowed for users while measuring Tj directly is quite difficult. Estimating Tj from Tc using thetasjc is commonly used even for the cases where quite big error is generated...
To examine dispersion of the packaging reliability of WLP, we grouped Weibull distribution of the temperature cycle test lifetime every tendency. And we examined in detail the cross section of the solder which is the typical sample of each group. As a result, it became clear that the lifetime and solder resist opening diameter had correlation. Furthermore, it became clear that the destruction modes...
Mold compound, substrate core, solder resist, underfill and die attach materials have been used for semiconductor packages for a long time. Recently, 3D packages (such as package-on-packages, stacked-die-packages) were introduced in the electronics industry. Moreover, pursing ultimate performance requires package body downsizing more and more. 3D packages are achieved by stacking laminate substrate...
With each advancing generation of process technology, the CPU power continues to rise, creating additional issues for thermal/mechanical packaging design. A common therme in next-generation CPU offerings will be the use of dynamic voltage and frequency. Scaling (DVFS) to manage the chip power during operation. With a DVFS policy, it becomes all the more important to study the potential impacts of...
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