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Hybrid bonding, with wafer-level bonding to form oxide-oxide bonds and Cu-Cu bonds, is a promising technology for 3D integrated circuits. In this study, we describe the design, processing. and characterization of test structures formed using hybrid bonding for wafers built in two different technologies; a 180 nm Al BEOL technology and a 110nm Cu BEOL technology. The reliability evaluation shows good...
3D Stacked Image sensor is the stacking of a Back-Side Illuminated (BSI) CMOS Image Sensor on a logic die. It enables compact size, higher performances and additional functionalities compared to standard BSI sensors. The highest footprint reduction is obtained with 3D hybrid bonding with metal interconnects between top and bottom tiers. Hybrid bonding process with oxide / copper direct bonding allows...
Glass (7740) and silicon (100) wafer are bonded using gold as the bonding medium and annealed to enhance the bonding strength at temperature about 450°C. The voids in the bonding interface are the main reason to cause the poor reliability of bonding, and scanning electron microscope (SEM) photos reveal that there are a number of voids in the craters on the surface of silicon wafer after bonding. It...
Glass (7740) and silicon (100) wafer are bonded using gold as the bonding medium and annealed to enhance the bonding strength at temperature about 450°C. The voids in the bonding interface are the main reason to cause the poor reliability of bonding, and scanning electron microscope (SEM) photos reveal that there are a number of voids in the craters on the surface of silicon wafer after bonding. It...
Today's semiconductor industry continues to deliver high performance and cost effective solution. Copper wire bonding is one of the hot topics on low cost alternative packaging materials. However, copper wire bonding is still not fully established and it requires significant engineering effort especially on the C65 low k, wafer with probed Al bond pads. A thin gold wire compared to copper wire will...
Gold and copper ball bonds were isothermally aged under moist conditions (85°C and 85% relative humidity (RH)) and wet conditions (85°C in DI water with and without NaCl) in an effort to better understand the corrosion mechanisms that operate under moist and wet conditions. The objective of this work is to undertake and report on the initial stages of a research project that aims to compare the performance...
We demonstrate a wafer-level 3D integration scheme with W TSVs based on Cu-oxide hybrid wafer bonding. Hybrid Cu-oxide hybrid bonding shows excellent bond quality and performances in terms of alignment, bond strength, and ambient permeation oxidation. Excellent performances of initial reliability and quality evaluations for Cu-oxide hybrid bonding are key milestones in proving manufacturability of...
Wafer level bonding is widely applied in the manufacture of sensors, actuators and CMOS MEMS. Bonding technology includes direct bonding, anodic bonding, eutectic bonding, adhesive bonding and glass frit bonding. Glass frit bonding has pattern-able, excellent sealing performances, high bonding strength, don't need apply any voltage during bonding process and less CTE mismatch compared to glass and...
The intermetallic compound (IMC) growths of Cu pillar bump with shallow solder (thin Sn thickness) were investigated during annealing or current stressing condition. After reflow, only Cu6Sn5 was observed, but Cu3Sn formed and grew at Cu pillar/Cu6Sn5 interface with increasing annealing and current stressing time. The kinetics of IMC growth changed when all Sn in Cu pillar bump was exhausted. The...
The reliability of IGBT chip surface electrode for bonding-wires is described. The power cycling (P/C) capability of an IGBT module is improved due to a suppression of chip surface aluminum (Al) electrode degradation with Nickel (Ni) plating. The P/C capability obtained with the Ni plating electrode is about 3 times higher than that with the Al electrode at a high temperature condition. Such a good...
Package is a key factor, and affects the reliability of LED. In this paper, the main failure modes and mechanisms that caused by poor package process were investigated through some failure analysis cases, and some improving methods to improve the LED's reliability are put forward.
The purpose of this work is the analysis of reliable wire bonding schemes for power SiC diodes working at high temperature. The surge current and the power cycling behavior of different wire bonding technologies are analyzed. A dedicated test bench was developed for the surge current and the power cycling reliability tests. It allows an accelerated reliability test, 105 cycles takes just 3 hours....
3D integration technologies using through-Si via (TSV) technologies are receiving increased interest. A wide diversity of technologies is being proposed and an increasing number of potential application areas are identified. Different application domains have different TSV requirements and justify different integration approaches. The most important challenges to a widespread use of 3D integration...
This technical paper presents the ultra low loop height challenges faced in the development of miniaturized SOT-923 package. It is drawn from the package development experiences for Flat Lead packages of 0.8 mm × 0.6 mm × 0.4 mm (SOD-923) which was successfully developed and introduced commercially. This product is mainly used on hand-held applications where the size has become smaller. Therefore,...
Flexible Printed Circuit (FPC) boards are being widely used for a number of applications to enable products in a three dimensional format thereby utilizing the “dead” space within the product envelop. During the past few years, the usage and complexity of FPC made of polyimide, polyester or teflon have grown substantially and are expected to continue to grow even more in the next coming years. In...
3D contactless technology based on capacitive coupling represents a promising solution for high-speed and low power signaling in vertically integrated chips. AC coupled interconnects do not suffer from mechanical stress, and the parasitic load is much reduced when compared to standard DC solutions, such as wire bonding and micro bumps. Communication system based on wireless interconnection scheme...
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