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The combination of deadbeat controller and open-end winding topology is effective for improving the response of current control of induction motor drive system. A deadbeat current controller achieves high gain by compensating the delay element of digital controller with current prediction and excluding it from the control loop. The response of a deadbeat current controller depends on the duration...
Increasing the voltage in aircraft applications may induce reliability problems associated to the occurrence of partial discharges (PD) in systems. Moreover, the specificities of both the environmental conditions (temperature, pressure, relative humidity …) and of the harsh electrical conditions (high voltage, high frequency, high dV/dt …) contribute to the risk of partial discharges. This paper describes...
In this paper, the authors propose an on-die power supply noise measurement system for power integrity characterization using one bias supply. The measurement system is operated by the bias voltage provided to logical blocks such as Core and IO block in a microprocessor since another supply power rail for the measurement system can create a coupling to the existed power rails. The power supply noise...
DC/DC converters are widely used to produce various power supply voltages required for various electronic components on a board. Though DC/DC converter is more efficient than the linear regulator is, however, the switching noise becomes larger with the increase of the switching frequency. In particular, ringing noises at the sharp rising edge of the switching waveform generated by the effect of the...
This paper describes IMPREAL 2.0, a system developed in LabVIEW which automates the acquisition of voltage impulse waveforms from digital oscilloscopes and implements the mathematical procedures described in the new standards IEC 60060/2010. The system controls Tektronix oscilloscopes and is able to automatically calculate the time and amplitude parameters of lightning impulses, switching impulses,...
Power factor correction (PFC) converters are commonly used at the first stage in single-phase switch-mode AC/DC power converters to improve the input current waveform distortion and achieve high efficiency in energy conversion. The operating condition of MOSFET in a PFC converter changes dynamically and periodically. This paper studies the operating condition and output load dependency of spectrum...
A deeper understanding of the noise and variability sources in resistive switching memory (RRAM) is needed for device improvement and scaling down. To meet this challenge, this work addresses switching statistics and read noise in RRAM. First, an analytical model for resistance variability in set and reset states is presented. Then, random telegraph noise (RTN) is discussed in terms of trap-induced...
In this paper, the main noise contributors and their effect on single-shot precision are analysed. The TDC analysed here is based on the Nutt method, i.e. the TDC comprises of a clock counter combined with two interpolators, which are either time-to-voltage converters or dual-slope converters. We identify the main noise sources in a time-to-voltage converter and provide analytical estimations of measurement...
This paper presents statistical characterization of Random Telegraph Noise (RTN) in hafnium-oxide-based Resistive Random Access Memories (RRAMs) in High Resistive State (HRS). Complex RTN signals are analyzed exploiting a Factorial Hidden Markov Model (FHMM) approach, allowing to derive the statistical properties of traps responsible of the multi-level RTN measured in these devices. Noise characteristics...
The paper presents experimental demonstration of 6-bit digital-to-analog (DAC) and 4-bit analog-to-digital conversion (ADC) operations implemented with a hybrid circuit consisting of Pt/TiO2−x/Pt resistive switching devices (also known as ReRAMs or memristors) and a Si operational amplifier (op-amp). In particular, a binary-weighted implementation is demonstrated for DAC, while ADC is implemented...
Parasitic inductance that exists in a package induces SSN (Simultaneous Switching Noise) and timing jitter. These noises cause malfunction of LSI and systems. The goal of this paper is to clarify the influence of the effective inductance of the package including mutual inductance by changing the number of simultaneously switching buffers and alternating adjacent buffers in the reverse direction each...
A low power interface circuit for multisensory system is presented in this paper. A SAR capacitance-to-digital converter (CDC) and a SAR analog-to-digital converter (ADC) are combined together so that capacitance or voltage from different sensors can be measured by the same circuit and converted to digital signal directly. A dynamic comparator with self-calibration is designed to achieve zero-static...
This paper presents a measurement-based data-processing approach to obtain parameters of multiple current components through a bulk decoupling capacitor for power integrity studies. A lab-made low-cost current probe is developed to measure the induced voltage due to the time-varying switching current. Then, a post data-processing procedure is introduced to separate and obtain the parameters of multiple...
The paper proposes conducted and radiated noise reduction using circuit balance on double switch converter. The main objective is to analyze common mode noise circuit of the single switch converter and improve by double switch converter. Common mode noise current is generated and flow through the switching impedance and parasitic capacitor to the frame ground and causes common mode noise emission...
A 32-channel front-end circuit for wireless Human Interface Devices (HID) is described. The front-end incorporates a Sigma-Delta ADC combined with an inverse-STF pre-filtering technique to achieve 10.8 ENOB at a conversion rate of 7.5μs per channel. Chopping and digital calibration are employed to achieve an offset voltage <; 850μV and gain error <; 0.17%. The HID front-end measures single-ended...
As technology process nodes continue to shrink, the performance of nano-technology devices becomes increasingly dependent on power quality. With core logic voltage reduced to 0.9 V, 40-nm devices are more susceptible to on-chip power distribution network (PDN) voltage noise. On-chip PDN voltage noise increases jitter and reduces a circuit's timing margin, which may lead to performance failures due...
This paper presents a detailed performance comparison (including efficiency, EMC performance and component electrical stress) between boost and buck type PFC under critical conduction mode (CRM). In universal input (90-265Vac) applications, the CRM buck PFC has around 1% higher efficiency compared to its counterpart at low-line (90Vac) condition. Due to the low voltage swing of switch, buck PFC has...
Random Telegraph Noise (RTN) characteristics of p-type silicon nanowire FinFET have been studied. It is shown that from multilevel RTN noise characteristics the presence of multiple traps inside the gate oxide may be predicted.
This paper presents a simple and inexpensive implementation of the accurate dual slope analog-to-digital converter (ADC). The proposed technique with positive reference voltage takes advantages of a bootstrap circuit to function as a precise noninverting/ inverting integrator. To achieve the constant reference voltage during integrating analog input voltage interval, a sample/hold (S/H) circuit is...
A 400 mW class-D speaker driver is implemented in 65 nm CMOS technology, using a 4th-order digital PWM modulator to eliminate the DAC and minimize the effects of analog imperfection. It achieves 120 dB dynamic range with up to 88% power efficiency while driving an 8 Omega speaker load.
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