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DC/DC converters are widely used to provide various power supply voltages required for many electronic components on a board. Though DC/DC converter is more efficient than the linear regulator is, however, the switching noise becomes larger with the increase of the switching frequency. In particular, ringing noises at the sharp rising edge of the switching waveform occurs by the effect of the parasitic...
Electromagnetic radiation is strongly related to power integrity of digital electronic systems. In order to estimate power supply noise exactly, chip-package-board co-design becomes more important to estimate the properties of chip-package anti-resonance. In particular, power supply noise is very sensitive to Q factor value of the anti-resonance. In this paper, three test chips were designed with...
DC/DC converters are widely used to produce various power supply voltages required for various electronic components on a board. Though DC/DC converter is more efficient than the linear regulator is, however, the switching noise becomes larger with the increase of the switching frequency. In particular, ringing noises at the sharp rising edge of the switching waveform generated by the effect of the...
Power supply noise is a serious issue for advanced CMOS LSIs and systems, since the performance of LSI chip is becoming more sensitive to power supply fluctuation under the lower power supply voltage. Because power supply noises are strongly related to the anti-resonance peak frequency in the total power distribution network (PDN), suppressing the anti-resonance peak is one of the most important design...
This paper shows a methodology to reduce electromagnetic radiation in typical CMOS digital systems from chip PDN design point of view. Total PDN property with anti-resonance peak can be strongly affected by on-die PDN property. Then, in order to suppress anti-resonance peak in total system PDN, design of chip PDN is more effective than off-chip damping method. Then, two similar test chips were designed...
Power supply noise has been becoming critical in advanced CMOS digital systems, because power supply noise induces false logic operation and instability. Especially, anti-resonance peaks in power distribution network (PDN) due to the chip-package interaction induce the unwanted power supply fluctuation. In this paper, power supply noises and total impedances of power distribution network (PDN) for...
Electromagnetic radiation is always headachy issue in developing various electronic systems. Because electro-magnetic radiation and interference (EMI) is very sensitive to signal routing and physical layout of power distribution network (PDN) in package and board as well as chip design. Therefore, chip-package co-design is becoming important by taking into account the total PDN impedance seen from...
Power integrity has became a serious issue in the advanced CMOS digital systems, because power supply noise must be suppressed to guarantee normal logic operation and its stability. Therefore, chip-package-board co-design has become important by taking into consideration the total impedance seen from the chip. Especially, parallel resonance peaks in the power distribution network (PDN) due to the...
Power integrity is a serious issue in the in the modern CMOS digital systems, because power supply noise excited in core circuits induces logic instability and electromagnetic radiation. Therefore, chip-package co-design is becoming important by taking into consideration the total impedance of power distribution network (PDN) seen from the chip. Especially, parallel resonance peaks in the PDN due...
Power integrity design has been becoming important in the advanced CMOS digital systems, because power supply noise induces logic instability and electromagnetic radiation. Especially, anti-resonance peaks in power distribution network (PDN) due to the chip-package interaction induce the unwanted power supply fluctuation, and result in large electromagnetic radiation. In this paper, power supply noises...
Because CMOS LSIs operate at higher clock frequencies in recent years, conventional methods for obeying EMC regulations are not sufficient only at package level and board level. So chip level counter-measure is even more important to reduce EMI as an excitation source of noise. In this paper, power supply noise was evaluated by fabricating two circuit blocks in a test chip. One was with on-chip capacitance...
Higher-speed signal transmission is strongly required on a printed circuit board to handle massive data in electronic systems. So, signal transmission loss of copper wiring on a printed circuit board has been studied First, total signal loss was divided into dielectric loss and conductor loss quantitatively based on electromagnetic theory. In particular, the scattering loss due to surface roughness...
Recently, ultra-wide bus 3D-SiP with TSV's has attracted great attention to achieve energy-saving and high-performance system level module. TSV technology is a new technology of vertical wiring to make shorter than the conventional wire bonding. However, the power supply integrity and signal integrity has become an issue due to the increase of simultaneous switching output buffers. In this paper,...
Simultaneous switching noise (SSN) is a serious design issue to stabilize power supply integrity and logic operation in advanced CMOS circuits and systems. Furthermore, SSN causes electromagnetic interference (EMI). Ringing frequency observed in the SSN waveforms is strongly related to the anti-resonance peak frequency of the total PDN impedance. Therefore, suppressing the anti-resonance peak is currently...
Power supply noise spectra generated by CMOS digital circuits has been shifting to the higher frequency range, as the clock frequency of CMOS digital circuit is becoming faster year by year. Therefore, a new electromagnetic band gap (EBG) structure is strongly required to prevent the wide frequency noise from DC to high frequency components so as to apply to any operating frequencies of CMOS digital...
Power integrity design has become a critical issue in digital electronic systems, as advanced CMOS LSIs operate at higher clock frequency and at lower supply voltage. Power supply fluctuation excited by core circuits or I/O buffer circuits induces logic instability and electromagnetic radiation. Therefore, total impedance of power distribution network (PDN) must be taking into consideration in the...
We evaluated low-impedance power distribution network (PDN) of decoupling capacitor embedded interposers for 3-D integrated LSI system. Measurements are carried out using the developed impedance analyzer system of a wide frequency range for evaluating ultralow impedance, and calculations are carried out using 2.5-D and 3-D finite element method (FEM) electromagnetic field simulator. We fabricated...
Reduction of PDN impedance is necessary to prevent false logic operation of the CMOS LSIs. Constant target impedance with frequency is used as a simple method to define PDN impedance of the system. However, this conventional target impedance did not change with frequency, and was not applied to the high frequency range where PDN impedance exceeds the constant value of target impedance. Therefore,...
Power integrity is a serious issue in the modern CMOS digital systems, because power supply noise excited in core circuits induces logic instability and electromagnetic radiation. Therefore, chip-package co-design is becoming important by taking into consideration the total impedance of power distribution network (PDN) seen from the chip. Especially, parallel resonance peaks in the PDN due to the...
The 4096 bits wide-bus three-dimensional integration device using through-silicon-vias (TSVs) has been designed and fabricated as a demonstrator for power integrity such as power distribution network (PDN) impedance and simultaneous switching output (SSO) noise characteristics. Anti-resonance peak of total PDN impedance was extracted at around 80 MHz. This result was well coincident with maximum SSO...
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