The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The highest electron mobility in Ge NMOS to-date, ~1.5 times the universal Si mobility, is demonstrated experimentally. Gate stack engineered with ozone-oxidation is integrated with low temperature S/D activation to fabricate Ge NMOS. Mechanisms responsible for poor Ge NMOS performance in the past are investigated with detailed gate dielectric stack characterizations and Hall mobility analyses for...
The main focus in this study is the ability to determine the CNL in Ge, defined as the crossing point where acceptor and donor-like trap densities are equal. We find CNL ~0.14 eV above the valence band edge, in good agreement with previous reports [3, 4], which locate it at 0.1 eV. The low-lying CNL is one of the essential reasons for negative charging of Ge surfaces, positive threshold voltage shift...
The fabrication of Germanium-On-Insulator (GeOI) by wafer bonding and ion-cut approach was investigated. With cyclic HF/DIW cleaning and N2 plasma surface activation, large-area layer transfer of GeOI substrates was realized by ion-cut processes with bulk Ge wafer as the donor wafer. The GeOI substrates are thermally stable up to 550??C annealing and surface roughness can be smoothed down to 0.3 nm...
The extraction of the trap density on Ge/gate-stack (top) and Ge/BOX (bottom) interfaces of germanium-on-insulator pMOSFETs is shown using the Lim & Fossum model historically developed for fully depleted SOI devices. The doping and the thickness of the Ge film do not change significantly the top interface trap density. The bottom one is slightly raised by doping the Ge film. This method can be...
Ge-MISFETs have attracted much attention as next generation MOSFETs because of their higher carrier mobility than Si-MOSFETs. However, it has been regarded as extremely difficult to form a gate stack structure with good quality because surfaces of Ge and the oxide films are very unstable thermally and chemically. Therefore, establishment of a surface passivation technique is one of the most important...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.