The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
We report on a novel Thin-Silicon Injector (TSI) selector concept with bidirectional operation for high density resistive switching memory. Model-based analysis shows how the current drive-nonlinearity trade-off can be broken by properly combining physical material properties to enable decoupling control parameters of the current injection from those of selectivity. We demonstrate experimentally structures...
Among the alloys of Group IV semiconductors the Germanium-Tin (GeSn) alloy is particularly interesting as it exhibits a small and direct band gap for a certain range of Sn content [1]. This feature can be exploited for highperformance tunnel FET (TFET) application [2], [3]. The small direct band gap enhances the band-to-band-tunneling (BTBT) rate which results in a high on-current. In order to reduce...
Reducing the drain voltage, VDD, is the key leverage to lower power dissipation in circuits, since the dynamic losses increase proportional to VDD2 multiplied by the frequency. Presently, fully depleted silicon on insulator (FDSOI) technology sets the level pole for ultra-low power applications: At 0.6 V a clock frequency of 1 GHz has been achieved [1]. A further reduction of VDD limits the performance...
Tunneling field-effect transistor (TFET) could achieve sub-60 mV/decade subthreshold swing S at room temperature and could enable ultra-low supply voltage VDD and power consumption. Drive current above 100 μA/μm was achieved in III-V-based n-channel TFETs (nTFETs), due to the direct BTBT and high electron mobility in III-V materials [1–2]. However, more research is needed for p-channel TFET (pTFET)...
The 3D Monte Carlo simulation of an Si dot-based double-tunnel junction shows not only the possibility of shot noise suppression down to the Fano factor of 0.5, but also of super-Poissonian noise in the case of multi-state process. The counting statistics of the tunneling events provides a clear interpretation of the different noise regimes according to the balance between the different tunneling...
The promising potential of tunneling FETs (TFETs) for steep switch behavior with gate controlled band-to-band tunneling (BTBT) mechanism has attracted much attention for supply voltage (VDD) scaling and power consumption next generation CMOS [1, 2]. However, the challenge for TFETs is lower drive currents as compare with MOSFET due to a high conductance resistance while reverse bias. Tunneling FETs...
Potential well engineering is proposed for NAND Flash memory. With a variable (~2nm-4.3nm) tunnel barrier, the engineered well (EW) enhances tunneling of carriers during program/erase (P/E) to result in fast P/E, while it suppresses charge loss under the retention mode to result in good data retention. The EW also improves endurance, as it is insensitive to the P/E stress induced tunnel barrier degradation...
Sub 5 nm tri-gate nanowire MOSFET is successfully developed with good uniformity by using conventional technology in the SOI structure. Performance of the poly Si channel is compared with that of the single Si channel. On-state current of n-FET has attained to 802 uA/um for single Si channel, while 471 uA/um for poly Si channel, which is 60 % of performance of the single Si channel at LG ~ 5 nm due...
Polarities of plasma charging damage in n- and p-channel MOSFETs with Hf-based high-k gate stack (HfAlOx/SiO2) were studied for two different plasma sources (Ar-and Cl-based gas mixtures), and found to depend on plasma conditions, in contrast to those with conventional SiO2. For Ar-plasma, which was confirmed to induce a larger charging damage, both n- and p-ch MOSFETs with high-k gate stacks suffer...
Since the very beginning of the flash memory era, the market has been dominated by the floating gate technology. However, as floating gate flash continues along a very steep scaling path, more and more barriers start to appear, limiting further scaling possibilities of the technology. At the same time, other concepts are preparing to take over. This paper concentrates on the prospect of high-k materials...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.