The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A fully planarized two-level-metal structure has been successfully fabricated at 0.5 μm groundrules with the use of X-ray lithography at all processing levels. A 0.5-μm minimum feature size was required for all levels, including the second-level metal. Planarized PECVD oxide and PECVD nitride were employed as dual dielectric layers below M1 and M2. Chemical vapor deposition (CVD) W studs...
A modular framework is being used for the implementation of process control in VLSI fabrication. The function of process control has been divided into three core modules: the flexible recipe generator, the run by run controller and the real-time controller. These three modules act to divide up the control function on the basis of the time scale of the response and the range of operating space encompassed...
The technology used to fabricate high-speed and low-power 64-Mb DRAMs (dynamic random access memories) is described. The memory cell developed is a high-storage capacitance bit-line shielded stacked capacitor (STC) cell in which the storage capacitor is formed over the bit-line and a cylindrical storage node structure is used for low-voltage memory operation. The main features of the technology are...
A controllable method is described for the selective or nonselective growth of high-quality Al on Si(100), Si(111) and TiN versus SiO2 by low-pressure chemical vapor deposition (LPCVD) using a dimethylaluminum hydride (DMAH) source. The selectivity deposited Al on Si surface was confirmed to be single-crystal by microregion observation with a scanning μ-RHEED microscope. The authors produced...
Selectively deposited tungsten can greatly improve metal step coverage in the contacts. At the same time, the etch-stop properties of tungsten allow one to tighten up a number of design rules leading to a reduction in die size. Blanket tungsten (with an etchback or as an interconnect by itself) has many of the same advantages. Device reliability is also greatly improved due to the refractory nature...
A major hurdle in VLSI/ULSI technology has been the inability to grow ultrathin oxides with low defect and interface trap densities and to generate a planar stress-free silicon/silicon-dioxide (Si/SiO/sub 2/) interface. The authors describe the fabrication of thin multilayered stacked SiO/sub 2/ structure with such qualities. A huge improvement in the quality of these stacked oxides has been achieved...
Reliable Al metallization has been performed using a plasma CVD (chemical vapor deposition) technique. In-situ doping of carbon onto an Al film suppresses the growth of Al crystal grains, hillocks and spikes. MTFs (median times to failure) of the films due to electromigration are one order of magnitude greater than that of a pure Al film. The resistivity is reduced by a factor of 3 to 4 when carbon-doped...
A shallow trench isolation (STI) technology, RIE (reactive ion etching), CVD (chemical vapor deposition) oxide fill, and polarization are used to realize lithography-limited, submicron device and isolation dimensions. A novel boron diffusion technique is used for nMOSFET field doping, so that the parasitic sidewall inversion (leakage) problem is eliminated. It is shown that both the channel width...
A novel sputter-deposited Al-Si-Pd alloy has been investigated for use for VLSI interconnection in place of Al-Si-Cu-alloy. Workability of the Al-Si-Pd alloy in submicron patterning has proved to be much better than that of Al-Si-Cu alloy, and both electromigration resistance and stress-induced migration resistance are higher than those of Al-Si-Cu alloy. Long-term reliability tests of a resin-molded...
A novel local interconnect technology utilizing polysilicon strapped with selective CVD (chemical vapor deposition) tungsten (W) has been developed for advanced CMOS applications. Problems associated with etching of a local interconnect material do not exist, since the local interconnects are of polysilicon and defined at the same level as the gate electrodes. CVD W deposited on the polysilicon serves...
The authors report a novel method of fabricating chemical-vapor-deposited (CVD) small-grain tungsten films and its application to multilevel metal interconnects. By interrupting the tungsten grain growth using a layer of thin silicon and by consuming the silicon layer during subsequent tungsten deposition, tungsten films with fine grains can be obtained. The fine-grained tungsten shows a significant...
Selective growth of aluminum with smooth surface topography is realized using a double-wall CVD (chemical vapor deposition) system in which the substrate is positioned between two heaters with different temperatures. Aluminium is deposited selectively onto silicon, metals, and silicides of the substrate; no deposition occurs on the SiO/sub 2/ surface. This technique is available for filling high-aspect...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.