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A direct high-k/Si gate stack has been proposed for gate oxide scaling. With LaCe-silicate, an EOT of 0.64 nm with an average dielectric constant (kav) of 17.4 has been obtained and an extremely low gate leakage current (Jg) of 0.65 A/cm2. The flatband voltage (Vfb) can be controlled by the compositional ratio of La in the LaCe-silicate layer. Furthermore, incorporation of Ge atom into the silicate...
The goal of this work is to study the transient electrical features of metal/high-k interface in MOS stacks. To this aim, electrons are injected from the gate of TaN/Al2O3/SiO2/p-Si capacitors in pulsed regime. The displacement current flowing during the pulse front is detected, and the capacitance is extracted. As a result, for the first time, a flat-band instability related to electron trapping...
MOS capacitor structure with double-layer heterogeneous nanocrystals consisting of metal and semiconductor embedded in gate oxide for the applications of nonvolatile memory have been fabricated and characterized. By combining the self-assembled Ni nanocrystals and vacuum electron-beam co-evaporated Si nanocrystals in SiO2 matrix, the MOS capacitor with double-layer heterogeneous nanocrystals can appear...
Effect of the flat band voltage reduction (roll-off) in highly scaled high-k/metal gate stacks is discussed. The proposed mechanism explains the roll-off phenomenon as caused by the metal electrode/high-k dielectric-induced generation of positively charged oxygen vacancies in the interfacial SiO2 layer in the high-k dielectric stack. The model is consistent with the observed roll-off dependency on...
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