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Photovoltaic (PV) module degradation in the field is a known issue; however, understanding the modes and mechanisms in which modules degrade is still a major undertaking for researchers. To understand the degradation modes and mechanisms, both nondestructive and destructive characterization techniques need to be employed. This paper presents the results and conclusions obtained based on a few major...
A gas sensor based upon an array of reduced graphene oxide (RGO) and single wall carbon nanotube (SWNT) micro-assemblies is presented. Due to the nature of their structure and exceptional surface-to-volume ratio, graphene sheets and carbon nanotubes demonstrate unparalleled chemisorption properties, providing greater sensitivities than a bulk material. Micro-assemblies of RGO platelets and SWNT's...
LSMO thin films materials have a strong interaction between their electrical and magnetic properties that could be translated into innovative tunable components. The knowledge of the electroactive and magnetoactive properties of these materials is essential for modeling and design of their novel based- devices. The activity of these materials can be described by their electro/magento resistance and...
This paper reports the design, modeling, fabrication and measurement of a CMOS-compatible surface-micromachined test structure for the determination of the thermal conductivity of thin films based on the Seebeck effect. The Seebeck effect-based temperature sensing is more advantageous for thin film materials with a relatively large Seebeck coefficient, such as lightly doped poly-Si and poly-SiGe....
Making reliable through-die interconnects for three-dimensional (3-D) wafer stacking technologies requires a reduction in wafer thickness combined with a larger wafer diameter, which in turn requires new methods for wafer handling. Of the different wafer-level bonding techniques, temporary wafer bonding adhesives are becoming increasingly important in both integrated circuit and MEMS technologies...
The resistive switching behavior of Ag/Si3N4/Pt device was observed and studied for the first time. Resistance ratio larger than 4*102 and 104s retention time were achieved which indicating its potential for resistive switching memory application. A physical model is proposed to explain the resistive switching behaviors of Ag/Si3N4/Pt devices.
Physical and electrical processes involved in the lifecycle failure of metal contacts in MEMS RF cantilever beam contact switches are of a great interest to switch designers. The main failure of MEMS contact switches occurs at the metal contacts. This paper describes a specially designed nanoindenter based experimental setup for characterizing the physics and mechanics of MEMS scale electrical contacts...
Tunability is being driven by a number of very interesting enabling technologies. This work demonstrates the feasibility of ferromagnetic thin film tunability at ambient temperature for radio frequency applications. A 400 nm thick LSMO thin film is formed by the chemical solution deposition (CSD) on the top of indium tin oxide (ITO)/SiO2/Si heterostructure. Interdigitated capacitor metallization is...
The formation of ultra-shallow n+ layers by P or As implantation and subsequent rapid thermal annealing (RTA) or flash-lamp annealing (FLA) is investigated. The focus is on diffusion and activation of dopants. RTA leads to considerable broadening of the shallow as-implanted profiles by concentration-dependent diffusion. In contrast, FLA does not cause any diffusion and is therefore a promising method...
This paper presents an innovative structure based on 3 dimensional integration technology, where ultra thin inter layer dielectric enables a dynamic threshold voltage (VTH) control. A sequential process flow is proposed to fabricate 3D devices with dynamically tunable VTH. This ability can be exploited to design SRAMs cells with increased stability and surface density compared to planar technology...
Continuous scaling, necessary for enhanced performance and cost reduction, has pushed existing CMOS materials much closer to their intrinsic reliability limits, forcing reliability engineers to get a better understanding of circuit failure. This requires that designers will have to be very careful with phenomena such as high current densities or voltage overshoots. In addition to the reliability issues,...
To increase memory bandwidth with minimum area overhead, the new concept of 3D-stacked memory structure consisting of a small sense amplifier shared with a few 3D memory cells has been presented. The 16 bit 3D-stacked TiO2 memory chip was fabricated and demonstrated. The estimated bandwidth per unit area of 3D-stacked memory in sub-65 nm CMOS technology indicates that the 3D-stacked memory has potential...
Novel 3D stacked gate-all-around multichannel CMOS architectures were developed to propose low leakage solutions and new design opportunities for sub-32 nm nodes. Those architectures offer specific advantages compared to other planar or non planar CMOS devices. In particular, ultra-low IOFF (< 20 pA/mum) and high ION (> 2.2 mA/mum) were demonstrated. Moreover, those transistors do not suffer...
We report a successful implementation of epitaxially grown Phosphorus-doped (P-doped) embedded SiC stressors into SOI nMOSFETs. We identify a process integration scheme that best preserves the SiC strain and minimizes parasitic resistance. At a substitutional C concentration (Csub) of ~1.0%, high performance nFETs with SiC stressors demonstrate ~9% enhanced Ieff and ~15% improved Idlin against the...
Long diffusion length is essential to reach high efficiencies (≫15%) on rear-junction solar cells. As a rule of thumb the minority carrier diffusion length should be at least three times as long as the wafer thickness. Thanks to the smaller capture cross-section of impurities measured in n-type material, n-type silicon can exhibit a diffusion length exceeding 600 μm even in its multi-crystalline form...
The field of embedded electronic systems is still emerging, e.g. in attractive products from widespreaded industry as well as in corresponding academic and industrial research activities. Here, multipurpose adaptivity and reliability features are playing more and more central roles, especially while scaling silicon technologies down according to Moore's goals. On the other side reconfigurable computing...
ldquoDevelopment for advanced thermoelectric conversion systemsrdquo supported by the new energy and industrial technology development organization (NEDO) has been successfully completed as one of the Japanese national energy conservation projects. Three types of the cascaded thermoelectric modules operating up to 850 K in high electrode temperature and two types of Bi-Te thermoelectric modules operating...
The polycrystalline samples of BaSi2, SrSi2, and LaSi were prepared by spark plasma sintering (SPS). The electrical resistivity (rho) and Seebeck coefficient (S) were measured above room temperature. The S of BaSi2 was negative and the absolute values were rather high (-669 muVK-1 at 337 K). The S of SrSi2 was positive and the absolute values were lower (118 muVK-1 at 332 K) than those of BaSi2. For...
Cooling is important to keep the temperatures of the highly integrated silicon electronic devices and power devices e.g. power MOSFET, IGBT. Yamaguchi et al. have proposed a new scheme to cool down the devices by its own current named ldquoself-cooling devicerdquo, in which the cooling process uses Peltier effect. In the proposed scheme, we should use the materials that have high thermal conductivity,...
The present work aims at studying the cooling performance of a thermoelectric device that integrated with integrated heat spreader (IHS) on a flip-chip plastic ball grid array (FC-PBGA) package. The new thermoelectric device herein is fabricated on the metal substrates by flip-chip assembly process. Thermal performance of the new package was comprehensive studied. The thermal resistances of IHS with/without...
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