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In this work, a new empirical method is proposed to incorporate the initial substrate warpage into package stress simulation. As a first step, the bare substrate strip warpage characteristics were mapped. The out-of-plane displacements of the substrate strips were measured as a function of temperature using shadow moire technique. It was observed that the warpage values of the bare substrate vary...
In recent years, electronic product have been demanded more functionalities, miniaturization, higher performance, reliability and low cost. Therefore, IC chip is required to deliver more signal I/O and better electrical characteristics under the same package footprint. None-Lead Bump Array (NBA) Chip Scale Structure is then developed to meet those requirements offering better electrical performance,...
The ultra fine pitch micro bump became the future trend due to the development of 3D IC. In this research, three-dimensional simulation was employed to examine the temperature distribution in micro SnAg solder bumps. According to the result, the temperature distribution in solder bump of micro bump is nearly uniform. In addition, the hot side is near the substrate side, whereas the cold side is near...
Microelectronic packages can be considered as composite structures fabricated from highly dissimilar materials. Interface delamination related failure often occurs when the packaged devices are subjected to thermo-mechanical loading. The analysis of delamination of a laminate structure with a crack along the interface is central to the characterization of interfacial toughness. Due to the mismatch...
Digital speckle correlation method (DSCM) is used to measure the thermomechanical coupling effect in COB packaging structures. CCD camera is applied to capture the speckle patterns of CMOS chip at different temperature fields. Analyzing the speckle patterns, the in-plane deformation of the CMOS chip is obtained. Based on the trigonometrical theory, out-plane displacement can be obtained by measuring...
This paper presents a reliability based optimization modeling approach demonstrated for the design of fine pitch ball grid array (fpBGA) structure. In this study the focus is on the strategy for handling the uncertainties in the package design inputs and their implementation into the design optimization modeling framework. The analysis of thermo-mechanical behavior of the package is carried out to...
Window ball grid array (wBGA) package has become one of the most popular alternatives for DRAM packaging due to its high I/O density, high heat dissipation, low profile and high electrical performance. The reliability issue with excessive warpage of the wBGA packages, which results in solder joint failure during or after solder reflow process, or during thermal cycling, is needed to be resolved. To...
This study presents a multi-disciplinary approach in order to investigate the influence of hygroscopic stresses and stress relaxation in Epoxy Molding Compounds (EMC) on the apparent interfacial fracture toughness of Cu/EMC interfaces. Bi-material beams were designed and produced via transfer molding similarly to the process used in state-of-the-art semiconductor packaging. An empirical method was...
Warpage of micro-electronics caused by the curing process and thermal cycling is of major importance in electronic packaging. Industry is availed by good methods to be able to predict warpage accurately. The main difficulty for prediction of warpage is caused by the complicated material behavior of molding compound. It turns out that the mechanical behavior of molding compound is dependent on time,...
The reliability of Chip-On-Film (COF) packages is fundamentally dependent upon the quality of the thermal performance. The present study commences by performing an experimental investigation to establish the temperature at surface of driver IC within the COF packaging application under electric power conditions. A finite element (FE) model is then constructed to simulate the thermal behavior within...
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