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In this paper, the cage-rotor induction motor and the matrix-rotor induction motor, which are driven at the same rotational speed, are analyzed using the three-dimensional finite element method, and the characteristics of these motors are compared with each other.
This paper reports results on FEM modeling in order to calculate stress distribution at the Cu/Si boundary of TSVs after the fabrication process (annealing) using ANSYS software. Residual interfacial shear stress is estimated to be close of 200MPa for a 5μm radius circular copper filled TSVs while Von-Mises simulations give a radial distribution with a maximum above 500MPa around the TSV. All these...
The temperature-current rise in modern (up to 100–150 microns wide) PCB traces is simulated using three software tools ANSYS, HyperLynxThermal and ELCUT. The results are compared with the IR measurements in PCB copper traces with different sizes and substrate materials. It is shown that ANSYS correctly describes the thermal behavior for all tests, other tools have some limitations for small size traces.
This paper presents a complete analysis of electromagnetic losses including AC copper losses, iron losses and PM losses when the brushless AC PM machine is driven by PWM. Firstly, 2D finite element analysis (FEA) has been used to calculate the electromagnetic losses at rated operating and full load-maximum speed points as the studied machine is equipped with no-segmented PM array. An electromagnetic...
In this paper, we studied the problem of IR drop of high performance multilayer printed circuit boards (PCBs). Adaptive mesh is used to simplify the process and improve efficiency. It is found that both vias contact of voltage regulator module (VRM) and the copper planes produce significant IR drop. A novel method for IR drop reduction is proposed, which can significantly reduce the resistance introduced...
The stacked memory device that combined eight single memory units in the vertical direction was investigated in this study when the device was subjected to the random vibrations. The fine computational model of the stacked memory with eight units assembled on board-level was built by ANSYS. The modal analysis was carried out first. By applying the power spectrum according to the GJB-548B standard,...
The study focus on the process of metal electroplating on copper substrate to assemble LED chips and molding PET-copper foil to implement a flexible module with LED chips. The process can be divided into two parts,-assembling process and molding process. The LEDs are integrated on copper foil which can deal with the heat dissipation problem effectively. The metal electroplating on copper circuitry...
A wireless charging system for a lithium-ion (Li-Ion) rechargeable battery using printable Conformal Strongly Coupled Magnetic Resonance (CSCMR) is proposed. This charging system could be used for implantable devices or small portable electronic devices. The charging circuit consists of the transmitter (TX) and receiver (RX) elements along with the RF-to-DC bridge rectifier and a LTC4070 designed...
The study focus on the process of metal electroplating on copper substrate to assemble LED chips and molding PET-copper foil to implement a flexible module with LED chips. The process can be divided into two parts,-assembling process and molding process. The LEDs are integrated on copper foil which can deal with the heat dissipation problem effectively. The metal electroplating on copper circuitry...
The stacked memory device that combined eight single memory units in the vertical direction was investigated in this study when the device was subjected to the random vibrations. The fine computational model of the stacked memory with eight units assembled on board-level was built by ANSYS. The modal analysis was carried out first. By applying the power spectrum according to the GJB-548B standard,...
In this paper, we studied the problem of IR drop of high performance multilayer printed circuit boards (PCBs). Adaptive mesh is used to simplify the process and improve efficiency. It is found that both vias contact of voltage regulator module (VRM) and the copper planes produce significant IR drop. A novel method for IR drop reduction is proposed, which can significantly reduce the resistance introduced...
As complex multi-layered packaging becomes more common in microelectronic design, delamination remains a prominent failure mechanism due to coefficient of thermal expansion mismatch. Numerous studies have investigated interfacial cracking in microelectronic packages. These studies commonly use classical interfacial fracture mechanics analyses, but such analyses require knowledge of starter crack size,...
With the increasing demand for reduced package size and enhanced package performance, the semiconductor industry has intensified focus on the development of alternate technologies, resulting in significant interest in flip chip or direct chip attach (DCA) packages using copper pillar bump interconnects. In DCA packages, the coefficient of thermal expansion (CTE) mismatch between different materials...
Replacing Silicon Dioxide (SiO2) with low-k and ultralow-k (ULK), as a dielectric, in the Back-End-Of-Line (BEoL) has allowed the trend of miniaturization and convergence to continue. Although using low-k and ULK greatly increases the device performance, being mechanically weak these dielectric materials pose a serious challenge from the reliability standpoint. Delamination along the metal-dielectric...
In order to increase mechanical strength, heat dissipation and ampacity and to decrease failure through fatigue fracture, wedge copper wire bonding is being introduced as a standard interconnection method for mass production [1]. To achieve the same process stability when using copper wire instead of aluminum wire a profound understanding of the bonding process is needed. Due to the higher hardness...
Flip chip technology has attracted much attention in electronic industry as it fills the need for low cost, miniaturization and high performance requirements of electronic products. For such devices, package reliability under drop impact is a great concern to the manufacturers as these electronic packages are very much vulnerable to solder joint failures caused by the mechanical shock and the PCB...
The stresses of TSV (Through Silicon Via) and Si chips in 3D-SiP were discussed with a large scale simulator based on FEM (Finite Element Method), ADVENTURECluster. In this study, the stacked layer structure of Si chips is modeled accurately. Thermal stress simulation for TSV structure in Si chips is carried out under thermal loads due to device operation and reflow process. In case of device operation,...
Efficiency is one of the main concerns during the design phase of switch mode power supply. Planar magnetics based on PCB windings have the potential to reduce the magnetic manufacturing cost however, one of their main drawbacks comes from their low filling factor and high stray capacitance. This paper presents an analysis of different planar windings configurations focusing on dc and ac resistances...
Lifetime estimation of power semiconductors for various applications has gained technical importance. The main failures in high power semiconductors are caused by thermo-mechanical fatigue, mainly in solder and wirebonds, due to different coefficients of thermal expansions of the various packaging materials. Most of the lifetime models do not take all the operating parameters into account. There is...
In this paper a two-dimensional transient thermal model of the rotor of an induction motor during star-delta starting is presented using finite element formulation and arch-shaped elements. Excepting for providing a more accurate representation of the problem, the proposed model can also reduce computing costs. A temperature-time method is employed to evaluate the distribution of loss in various parts...
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