The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A simulation system of distribution network design and development based on similarity principle is introduced. This simulation system includes primary simulation system and secondary control system, the primary system simulates a 10kV neutral indirectly earth distribution system, which includes a bus, four feeders with different types and different length. System structure and parameter calculation...
We present in this paper a high-efficiency Class-E polar power amplifier (PA) with a novel digitally-controlled output matching network (OMN). The OMN varies the load impedance seen by the PA to modulate the amplitude of the output signal. It performs the modulation while simultaneously achieving a high power-efficiency by attaining an approximate zero-voltage-switching condition at the PA, and mitigating...
A new galvanically isolated DC-DC converter has been presented in this paper. The proposed topology is based on the quasi-switched-boost impedance network. It not only includes all positive characteristics of previous converters including continuous input current, high boost ability and high efficiency, but also has the prominent features of less passive elements utilization, small size and light...
As memory speed goes up higher and I/O counts continue to increase, simulations estimating SSN-induced jitter are necessary for timing quality [1]. Traditional SSN-induced jitter simulation for high-density I/O designs normally calculates transient noise from multiple aggressors on one victim in one time domain simulation. Multiple number of simulations are required to ensure the signal pin with worst...
A new quad mode 2-way Microstrip reconfigurable power divider is presented. The proposed power divider, through the use of 4 or 6 switches, can alternate the operating mode between a total of 4 modes. The four operating modes are: totally directing the power into one of the two output ports (1∶0) & (0∶1) and two-way equal power split with + or − 90o phase shifts (1∶j) & (j∶1). Several dividers...
An approach towards a high speed current mode SAR ADC is presented. Even though SAR ADCs based on charge redistribution have been significantly improved in efficiency and operating frequency, they are still limited by the settling requirements of the switched capacitor DAC. To overcome this limitation, we propose the use of a current mode SAR ADC incorporating a current steering DAC operating at 2...
This paper presents the laboratory simulation emulating application of a numerical distance relay. It yields a realistic scaled model for a two section radial feeder. Lumped models of transmission lines are constructed, which resemble the actual system. Protection of such realistic feeder enables the students and engineers to get a feel as to how a distance protection works. Provision is also made...
This paper proposes a novel complementary current approach to eliminating the code-dependence in the output impedance of current-steering digital-to-analog converters (DACs), and increasing the spurious-free dynamic range (SFDR) significantly. A 14bit 1.0GS/s current-steering DAC design example shows an SFDR increase of 10∼15dB. In traditional designs, one major effect that degrades the linearity...
Code and voltage dependence of the finite output impedance is a major contributor to current-steering DACs' nonlinearity. This paper introduces a novel output impedance linearization technique that very effectively reduces this code and voltage dependence. The linearization is achieved by using a small linearization DAC switched with control signals opposite to those for the main DAC. The area and...
Analysis of transient behavior is important for class E amplifier because high peak switch voltage may be imposed to the transistor in the transient response. However, transient behavior of class E amplifier due to load variation was not analyzed yet. In this paper, transient behavior of a class E amplifier due to load variation is simulated with PSPICE. As a result, it is found that a high transient...
In this paper a new passive sample and hold (S/H) structure employing a modified sampling switch circuit has been presented. In order to reach wideband input with high linear sampling, the sampling switch voltage dependency on input signal is reduced, dramatically. Furthermore, the proposed structure reduces signal feedthrough for high frequency inputs as well as enabling the merge of offset cancellation...
In this paper, the compensation of internal resistance of the Li-Ion battery is proposed. The requirement of fast and steady charger becomes the most important issue for power management ICs. Refer to the characteristics of the battery, how to charge the battery with adequate current and fasten the time of charging is critical to the devisers. Due to the impedance of battery pack, the energy of charger...
A delay-locked loop of multi-band selector with wide-locking range and low power dissipation is presented. The architecture of the proposed delay-locked loop consists of phase frequency detector, charge pump, band selector, multi-control delay line, and start-up circuit. The multi-band selector is used to extend operation frequency of delay-locked loop by switching the multi-control delay line. The...
Current mode (CM) scheme provides suitable alternative for the high speed on-chip interconnect signaling. This paper presents a energy-delay optimization methodology for the current-mode (CM) signaling scheme. Optimization for the CM circuits for on-chip interconnects requires a joint optimization of driver and receiver device sizes, as their parameters which affect the energy-delay performance depend...
Class D amplifiers are becoming the most feasible solution for embedded audio application. However, distortions due to the non-linear nature of switching stage are the main drawback for this amplifier topology. This paper discusses the design and implementation of high fidelity audio class D using sliding mode control scheme. This design method proves to be a cost effective solution for industrial...
In this paper, the design of a compact planar bandpass filter above a defected ground plane is presented. The filter is designed as a combination of microstrip resonators and exploits the properties of a planar electromagnetic bandgap (EBG) structure patterned unto the ground plane of the printed circuit board material to provide a very wide stopband of up to 5 times the fundamental frequency. The...
A novel switched-capacitor voltage divider was proposed in the previous work. It can achieve 1kW/in3 power density, 98% efficiency and has been demonstrated in system two-stage power architecture for laptop. However, the transient performance of the voltage divider remains unclear. In this paper, the small-signal average model of the voltage divider is presented firstly. It analytically demonstrates...
A thin film optoelectric transformer consisting of a p-n junction photocell (500??500 ??m2) and a multilayer spiral coil transformer (1.4??1.4 mm2), monolithically fabricated on a Si substrate, is proposed, and its fundamental characteristics are described. The optical power from a layer diode (LD) is converted into electric power by the photocell, and the photocurrent is then converted into an output...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.