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A new low-power current-reuse quadrature voltage-controlled oscillator (QVCO) is proposed. The proposed QVCO couples two complementary current-reuse Armstrong voltage-controlled oscillators (VCOs) using series coupling switches. The current-reuse technique reduces the power consumption, and the transformer-based Armstrong configuration improves the phase noise performance by increasing the negative...
A Frequency-to-voltage converter (FVC) for use in a system for feedback linearization of VCOs is presented. The VCO linearization is intended for use in an ADC application where high resolution, low power consumption, and low voltage operation is required. These requirements places stringent demands on the performance of the FVC. The proposed implementation of the FVC is a good fit for digital CMOS...
A novel low power consumption and low phase noise CMOS cross-coupled LC-tank voltage-controlled oscillator (VCO) is presented. Added negative transconductance technique is used in the proposed VCO in order to improve the phase noise of the circuit by increasing the quality factor of the tank. Furthermore, common mode double-pseudo-resistance utilized in the proposed circuit helps to achieve low power...
A quadrature voltage-controlled oscillator (QVCO) based on the time-varying gate-modulated coupling of two LC tank VCOs is introduced. Using a standard 0.18 mum CMOS process, the new topology is compared to the conventional series QVCO in terms of start-up loop gain, quadrature phase accuracy, phase noise, tuning range, and voltage headroom characteristics. In addition to comparable phase noise performance,...
A K-band low power VCO fabricated by 0.13 mum CMOS technology is developed. By employing a NMOS cross-coupled pair with a transformer feedback, low phase noise under low dc power condition can be achieved at higher frequency. The VCO exhibits a 2.2 GHz frequency tuning range. The output power and the phase noise at 1 MHz offset are -10 dBm and -113 dBc/Hz, respectively. The dc power consumption is...
In this paper, a novel low phase-noise and wide tuning-range CMOS differential voltage-controlled oscillator (VCO) for a frequency DeltaSigma modulator (FDSM) is presented. The VCO which converts an analog input voltage to phase information is based on a differential ring oscillator with modified symmetric load and a positive feedback in the differential delay cells, combined with a new bias circuit...
This paper describes a low phase noise low dc power quadrature voltage controlled oscillator (QVCO) with a reflection-type IQ modulator. The QVCO using a standard bulk 0.18-mum CMOS process achieves a low phase noise of -115 dBc/Hz at 1-MHz offset frequency, a figure of merit (FOM) of - 191 dBc/Hz, and a core dc power consumption of 5.8 mW with a supply voltage of 1.8 V. The tuning frequency of the...
The CMOS process moves into the sub-micron regime, low voltage circuit design techniques will be required for highly integrated wireless transceivers. The complementary CMOS VCO is a simple design topology for high frequency and low phase noise. However, it requires a high supply voltage due to the stacking of transistors. For operating at the low voltage, in this paper a modified complementary coupled-pair...
This paper deals with the design problems associated to the implementation of low power wide tuning band low phase noise LC VCOs in low cost Si-integrated technologies. For that, a VCO was developed using a low cost 0.35 mum 2-poly 4-metal standard CMOS technology. The VCO uses a radio frequency switched varactor array (RFSVA) in the tank circuit in order to decrease the influence of the varactor...
In this paper, an ultra low-voltage multiband CMOS VCO based on tunable band-limited negative resistance approach is presented. The proposed technique eliminates the need for switching elements that are connected directly to the tank and limit the tuning range and phase noise performance. The oscillator draws a current of 6 mA from 0.5 V supply with a phase noise of -117 dBc/Hz at 1 MHz offset from...
A 5.6 GHz quadrature voltage-controlled oscillator (QVCO) designed with balanced Colpitts topology and coupled with back-gate coupling technique is presented. The use of back-gate of the core transistor as coupling terminals removes the noise contributed from the coupling transistor of conventional QVCO and reduces power consumption. The prototype is implemented using TSMC standard 0.18 mum 1P6M CMOS...
This work demonstrates the feasibility of a distributed voltage controlled oscillator (DVCO) designed for WLAN applications in a 65 nm CMOS process with standard VLSI backend. This DVCO achieves a tuning range of 1.1 GHz (from 10.6 GHz to 11.7 GHz) and a measured phase noise of -116 dBc/Hz at 1 MHz offset from the carrier. To achieve such performances, the DVCO consumes a DC current of 36 mA from...
This paper presents the design of a distributed voltage controlled oscillator (DVCO). This oscillator has been designed in a low-cost low-power standard STMicroelectronics 65nm CMOS process. The DVCO achieves a tuning range from 9.6GHz to 11.6GHz, a phase noise better than -101dBc/Hz at 1MHz offset from the carrier and a total power consumption of 29mW
The voltage controlled oscillator (VCO) is a fundamental block in RF IC architectures. Today's wireless communication applications do require a high level of performances from such a circuit, and specifically its phase noise figure and its power consumption. In fact, modern standards often demand for phase noise level better than -95 dBc/Hz at 100 KHz in the vast majority of cases, with supply voltages...
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