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Adding more functions to a logic circuit requires new process modules in the standard CMOS technology. Solutions for different memory types and analog circuitry are reviewed and the compromise between technical performance and additional processing cost will be shown.
This paper describes a 1 ??m BiCMOS process which offers numerous high performance, high precision devices suitable for mixed signal designs. The key features of the process are the performance and modularity of the process and the optimization of the bipolar transistor for analog applications.
A new two-transistor memory cell concept for 16-Mbit DRAM and beyond is described. This cell offers the advantages of small cell size, non-destructive and fast operation of reading with a built-in amplifier, and the capability of storing multiple-valued or analog information.
The effect of fluorination on the bulk oxide traps in poly-Si/SiO2/Si capacitors was studied using charge injection techniques. A substantial reduction of the density of both electron and hole traps was observed after fluorine implantation into the gate. The process of trap elimination was found to be dependent on the presence of hydrogen in the oxide, suggesting the involvement of some mobile species,...
The increased complexity of new capacitor cell structures for high-density dynamic RAMs requires an accurate description of the fabrication process. We present a three-dimensional topography simulation of a stacked capacitor cell, using a new simulation method for etching and deposition processes. Sequential process steps are simulated and results are shown in comparison to a measured cell structure.
An experimental field effect structure constructed without an insulating oxide layer is studied for use in high radiation total dose environments. Results are given for high frequency C-V curves carried out before and after a 50 KGy dose (5 Mrad [Si]) from a Co60 source.
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