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Cathode related current collapse effect in GaN on Si SBDs (Schottky Barrier Diode) is investigated in this paper. Capacitance and current relaxation measurements on diodes and gated-VDP (Van Der Pauw) are associated with temperature dependent dynamic Ron transients analysis showing that the main part of the current collapse at the cathode comes from a combination of electron trapping in the passivation...
A compact aging model for circuit simulation has been developed by considering all possible trapped carriers within MOSFETs. The hot carrier effect and the N(P)BTI effect are modeled by integrating the substrate current as well as the oxide field change due to the trapped carriers. Additionally, the carriers trapped within the highly resistive drift region are included for high-voltage (HV)-MOSFET...
Channel thickness Tch dependence of electron mobility μκρρ in thin In0.53Ga0.47As channels was investigated at temperatures T from 35 to 300 K using conventional parametric and pulsed ID-measurements, including a novel technique with time resolution down to 10 ns. It is show that accurate mobility measurements can be obtained using low T and/or fast pulsed measurements, thus avoiding significant underestimations...
A tunable PNP-based ESD clamp is designed for a 4.5V power IO in a foundry technology. Using Mixed-Mode TCAD simulations, we show that the clamp's trigger and holding voltage can be easily tuned by simple layout modifications. The fabricated clamp was characterized using an on-wafer TLP system, confirming the tunable Vt1=13.4−16.8V, with Vhold slightly above 10V and It2>1.2A. Finally, the clamp...
The underlying variability in the ReRAM device operation, while undesired in many applications, can be advantageous for hardware security primitives. ReRAM devices also come with the advantage of having non-linear multi-state operation. By comparison with previous reported ReRAM PUFs, which utilized spatial variations in the devices' binary ON/OFF states, we proposed to use sneak path currents and...
Amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) Thin-Film Transistors (TFTs) integrated with Si based CMOS processes is an emerging technology in ultra-low power applications. ESD characteristics of a-IGZO TFTs with a Si substrate are studied and compared to their characteristics on traditional foil/glass substrate. The ESD performance is shown to be improved, thanks to improved thermal properties of...
In this work, we investigate the robustness of 1-transistor-1-resistor (1T1R) synaptic array to implement a low-precision neural network. The experimental results on 1 kb HfOx-based RRAM array show a large on/off ratio (i.e. > 105×) and 5 stable resistance states can be reliably achieved with 10× window between adjacent two states. As the RRAM has the resistance drift over time under read voltage...
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