The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A 40 GHz 130nm CMOS power amplifier unit-cell is designed and simulated for use in a downlink transmitter of a millimeter-wave radio-over-fiber system. The system will be used as a complementary solution to Fiber-to-the-Home where geographical limitations and cost considerations are critical. The power amplifier unit-cell has a single-stage cascode structure for stability and input-output isolation...
A 40 GHz power amplifier (PA) driver for the remote antenna unit (RAU) transceiver of a mm-wave radio-over-fiber (RoF) system is presented in this paper. Mm-wave RoF is proposed as a complementary technology to fiber-to-the-home to minimize costs and to increase bandwidth. In order for RoF to be feasible, the cost of the RAU must be minimized through low-cost technology such as CMOS. The PA driver...
A miniature 40 GHz transceiver and radio front-end designed and simulated using a 0.13-μm RF CMOS process for Radio-over-Fiber applications is presented in this paper. The transceiver employs a direct-conversion architecture. The radio is designed for a frequency division duplex (FDD) communications system. PHY layer data rates as high as 1.5 Gbps on a wireless link are feasible using this radio design...
The design and performances of two-stage monolithic microwave integrated circuit (MMIC) medium power amplifier (MPA) for 5.8 GHz applications are presented using a 0.5um commercial GaAs pseudomorphic high electron mobility transistor (PHEMT) technology. The simulated performance shows a two-stage MPA are achieves an associated gain of 16.39dB, P1dB of 20.18dBm, power gain of 15.18 dB and the PAE of...
A dual-band, low phase-noise LC voltage-controlled oscillator (VCO) has been demonstrated in a 0.13μm CMOS process. The operating frequency of the dual-band VCO covers from 1.51GHz to 1.92GHz and from 2.13GHz to 2.73GHz. The proposed VCO features phase-noise of −116.4dBc/Hz and −121.5dBc/Hz at 1MHz offset frequency for both low corner and high corner end of the low-band operation. For high-band operation,...
A multi-modulus frequency divider with 5-bit or 6-bit operation mode is presented. It can work at clock frequency as high as 2.56GHz. The division ratio of this frequency divider covers from 32 to 63 (5-bit operation mode) and from 64 to 127 (6-bit operation mode) with unit step increment. Key features of the proposed architecture are the 2/3 divider cells which have common logic and almost the same...
This paper presents the design of a 2.4GHz LC VCO implemented using CMOS technology. Designed using a combination of both 0.13um and 0.35um CMOS process, this cross-coupled CMOS LC VCO achieves a simulated phase noise of -114.8dBc/Hz at 1MHz of offset frequency. The output frequency of the VCO can be tuned from 1.973GHz to 2.667GHz, which correspond to 694MHz tuning range, obtained by tuning the control...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.