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It is my great pleasure to welcome you to Kuala Lumpur on behalf of the IEEE Circuits and System Society Malaysia Chapter to attend the 10th biennial the 2010 IEEE Asia Pacific Circuits and Systems Conference (APCCAS2010). In this conference, we offer all delegates an exciting technical program that showcases the recent development in the field of circuits and systems. In addition, we hope all delegates...
On behalf of the technical program committee, we are pleased and honored to invite and welcome you to Malaysia and to the 2010 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2010). In APCCAS 2010, the technical program shows the novel and advanced development in the field of circuits and systems. We also hope all attendees have fun in enjoying the history and cultures of Malaysia.
The following topics are dealt with: analog signal processing; biomedical circuit and systems; test technology; circuits and systems for communications; computer-aided network design; digital signal processing; visual signal processing & communications; multimedia systems & applications; RF circuits; ADC/DAC; advanced video coding algorithms and architecture; algorithm/architecture design...
This paper presents a new high input impedance voltage-mode universal biquadratic filter with three inputs and six outputs using three plus-type differential difference current conveyors (DDCCs), two grounded capacitors, and three resistors. The proposed circuit can realize all the standard filter functions (low-pass, high-pass, band-pass, notch, and all-pass). Moreover, the circuit enjoys (i) the...
In this paper a high frequency low voltage low power tunable highly linear transconductor is presented. Shift level biasing is used at the inputs of both the amplifiers of a cross coupled differential pair for tuning. Bias currents of cross coupled differential amplifiers are adjusted to cancel third harmonic distortion. The proposed circuit is simulated in Cadence VIRTUOSO environment with UMC 0...
This paper describes a CMOS implementation of a Linear Voltage Regulator (LVR) used to power implanted systems. The topology is based on a classical structure of a Low Dropout Regulator (LDO) and receives his activation energy from a RF link characterizing a passive RFID tag. The LVR was designed to achieve important features like low power consumption, and a small silicon area without the need for...
A new high speed, low power and high resolution comparator architecture is presented. Offset voltage cancellation on latch stage and eliminating the preamplifier stages before regeneration latch in conventional architectures is the key idea proposed in this paper. Equivalent input referred offset voltage is dramatically reduced by controlled negative feedback loop and negative resistance of regeneration...
Chopping technique is an efficient approach to decrease the 1/f noise and low-frequency offset of CMOS amplifiers, but conventional chopper amplifier consumes large power because it required a wide-band amplifier exceed a chopping frequency and a post low pass filter (LPF) for eliminating modulation noise. In this paper, an improved chopper amplifier for reducing power consumption is presented which...
This paper presents the design and implementation of finite Radon transform (FRAT) on field programmable gate array (FPGA). To improve the implementation time, Xilinx AccelDSP, a software for generating hardware description language (HDL) from a high-level MATLAB description has been used. FPGA-based architectures with three design strategies have been proposed: direct implementation of pseudo-code...
Electromyogram or EMG signal is a very small signal; it requires a system to enhance for display purpose or for further analysis process. This paper presents the development of low cost physiotherapy EMG signal acquisition system with two channel input. In the acquisition system, both input signals are amplified with a differential amplifier and undergo signal pre-processing to obtain the linear envelope...
This paper presents a low-power MCU with remotely-programmable feature which is specifically optimized for implantable medical devices (IMDs). In medical applications the most critical requirements are low-power, energy-efficient, flexible, etc., which are provided by utilizing the techniques such as clock gating, power gating, instruction set improvement, DMA optimizations for data paths. The MCU...
This paper proposes a new Wireless-Powered Micro-Ball Endoscopy system, in which wireless power is emitted from an emitter array embedded in a floor and resonantly relayed by a passive wireless power jacket on patients. Comparing to other wireless powering endoscopy systems, both the patients' freedom of movement and the power efficiency are improved. To enhance the power efficiency, an End-Fire Helix...
In this paper a low-power low-noise amplifier for neural recording and biomedical applications is presented. The frequency band of the amplifier is tunable. It has a gain of 28.3 dB. The low and the high cut-off frequency can be adjusted from 24 mHz to 30.6 Hz and 4.5 kHz to 7.47 kHz, respectively. The circuit is designed in 0.18μm CMOS process, and it consumes only 77.8 nW at 1.8V supply voltage...
For SoCs (Sea of Cores!) which contains a large amount of IP cores with pre computed test data, the code based test data compression scheme is more suitable as it does not require any knowledge of internal nodes of IP. The data compression of any partially specified test data depends upon how the unspecified bits are filled with 1s and 0s. In this paper, the five different approaches for don't care...
This paper describes an algorithm for generating test signals to efficiently test the linearity of ADCs. Linearity is an important testing item for ADCs, and it takes a long time (hence is costly) to test low-sampling-rate, high-resolution ADCs. We here propose to generate a test signal consisting of multiple sine waves, to precisely test the linearity for specific important codes (such as around...
A symbolic calculation method for the sensitivity of frequency response to semiconductor device sizes is addressed for application in analog integrated circuit design. The transistor-size-based ac-sensitivity can be used for sizing devices and understanding the circuit behavior. Examples are provided to demonstrate that a design platform supported by symbolic ac-sensitivity and visualization can be...
This article presents techniques and circuits for jitter generation and measurement. The proposed implementations use periodic bit-streams and high-order PLLs to generate the desired phase signal. Here, an arbitrary signal is first encoded using sigma-delta modulation in the digital amplitude-domain and converted to the phase-domain through a digital-to-time converter (DTC) process realized in software...
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