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Large threshold voltage shifts (ΔVt) are experimentally observed in n-channel lateral DMOS transistors under high current-voltage regime. The effect is enhanced by the gate voltage as well as by the ambient temperature (TA) . By approximating the curves with the usually adopted power-law dependence (ΔVt = Atn), two different contributions are observed, and a clear increase of the exponent n is found...
In this work we present an investigation on the program, erase and retention properties of TaN/Al2O3/HfO2/SiO2/Si (TAHOS) nonvolatile (NV) memory cells fabricated on an advanced gate-all-around (GAA) architecture. The influence of several device parameters on the above characteristics is quantitatively assessed by numerical simulation, using an in-house developed simulation code suitable for both...
A numerical investigation on the behavior of the rugged LDMOS transistor operating in the high current-voltage pulsed regime is carried out with the aim of clarifying the physical origin of the drain-current "enhancement" visible in the output characteristics at high drain and gate biases. The so-called "quasi-saturation" effect and the current enhancement are explained in terms...
In this paper, the opportunities offered by mono-atomic layers of graphene for the fabrication of high-performance nanoribbon FETs are examined. Starting from the description of some fundamental material properties, such as the single-particle Hamiltonian in graphene and its analogy with massless Dirac fermions in quantum electrodynamics, we proceed with the examination of the GNR band structure and,...
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