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The integration of a diagnostic software-based self-test and a software-based self-repair method into a single statically scheduled superscalar processor is presented. The self-test method is used as start-up test in-the-field in order to detect and localize permanent faults in the processor. The determined fault state is handed over to a software-based self-repair program. This program adapts the...
The on-going down-scaling of devices in microelectronics has resulted both in reliability problems and in problems regarding power dissipation. Even worse, reducing supply voltages below 1 V has resulted in problems due to inevitable parameter variations from production on one side and from parameter shifts by aging effects on the other hand. So far, much work has been invested in new methods of fault-tolerant...
Diagnostic self-test in-the-field for processors becomes mandatory for reconfigurable fault tolerant processor-based systems. Software-based self-test techniques are well suited for providing a pass/fail test in-the-field. However, a diagnostic result for dynamically scheduled processors is usually not obtained by these tests, because the software has no control about the used components of the processor...
This paper addresses the problem of modeling the reliability of systems, where permanent and transient faults are handled in a combined manner. First, we briefly introduce the motivation for handling permanent and transient faults within a combined architecture. Then, based on the well known TMR scheme, we present the difference in modeling the reliability for permanent and transient faults. Subsequently,...
Digital integrated circuits fabricated in nano-technologies have first shown to be more vulnerable to transient errors effects than their predecessors. But they also show effects of stress-induced defects resulting in early life-time failures. In general, power dissipation problems and dielectric stress, due to high field strength, are the main reasons for shortened life-time expectations. On the...
Recently some fine-grained self-repair techniques for processors have been published that can handle permanent faults in particular components of a processor in-the-field. Unfortunately, the generation of diagnostic tests that can be used in-the-field for fault localization in these components is not solved satisfactorily. A few papers paid attention on improving the diagnostic capabilities of software-based...
Reconfigurable architectures are increasingly employed in a large range of embedded applications, mainly due to their ability to provide high performance and high flexibility, combined with the possibility to be tuned according to the specific task they address. Reconfigurable systems are today used in several application areas, and are also suitable for systems employed in safety-critical environments...
Large-scale integrated circuits and systems fabricated in nano-technologies exhibit new and enhanced fault properties which limit both their reliability and their life time. Transient fault effects have found most attention so far. They must be handled by on-line check and fault compensation based on duplication and triplication, typically at a significant amount of extra power. Such techniques are...
This paper deals with a diagnostic software-based self-test program for multiplexer based components in a processor. These are in particular the read ports of a multi-ported register file and the bypass structures of an instruction pipeline. Based on the detailed analysis of both multiplexer structures, first a manually coded diagnostic test program is presented. This test program can detect all single...
Integrated circuits and systems implemented by using nano-technologies show a combination of known and new faults effects, which affect their reliability and their operational life time, specifically in safety-critical applications. Transient fault effects such as single and multiple event upsets (SEUs and MEUs) require fast error detection and compensation. Permanent faults may occur due to early...
This paper presents performance estimations for a scalable VLIW soft-core in various XILINX FPGAs. It covers the low-cost low-power devices as well as the latest high-end FPGA families. The results represent the maximal clock frequency of the complete design including the processor core and the code and data memories. A scaling test has been done as well. In this case, the VLIW soft-core has incorporated...
This paper presents performance estimations for a scalable VLIW soft-core implemented in various XILINX and ALTERA FPGAs. It covers the low-cost low-power devices as well as the latest high-end FPGA families of both providers. The results present the maximal clock frequency of the complete design including the processor core and the code and data memories. In the soft-core scaling experiment, the...
The continued scaling of microelectronic elements down to atomic dimensions has a growing negative influence on their reliability and lifetime. Countermeasures like self repair and destressing are able to slow down this development, whereby a combination of these approaches promises even better results. This paper describes an extension of a M-of-N-systems with activity migration by load balancing...
In recent years many authors have addressed the growing vulnerability of nano-electronic circuits and systems to transient faults and wear-out effects. Hence present and even more future electronic systems need the property of resilience against different types of fault effects for long-term dependable operation. Fault detection, error compensation, and also repair technologies require a substantial...
The localization of permanent faults in a processor is a precondition for applying (self-)repair functions to that processor core. This paper presents a software-based self-test technique that can be used in the field for test and fault localization, there-by providing a high diagnostic resolution. It is shown how the self-test routine is adapted in the field to already detected faults in the processor,...
According to recent investigations on fault mechanisms in nano-scale integrated circuits, they suffer from wear-out effects that limit their life time seriously. For applications that combine a long life time and safety-critical functionality, means of fault compensation, de-stressing and eventual self repair are therefore becoming a must. This paper presents a circuit architecture that combines capabilities...
Technology scaling inevitably leads to fabrication processes, which are more susceptible to production faults. At the same time, devices become more vulnerable to wear-out effects, which reduce the long term system reliability. The upcoming challenge of future designs is the development of integrated test and repair techniques dealing with both types of fault mechanisms. Our paper presents a built-in...
Due to predictions and first experiences with large-scale integrated systems based on nano-size features, fault tolerance and eventually even self repair have become important technologies for the implementation of long-time dependable systems. While memory self test and self-repair is state-of-the-art in system design, logic in-system repair seems to be a much more challenging problem, due to the...
Predictions for the properties of integrated circuits and systems fabricated in emerging nano-technologies indicate a rising level of static and dynamic faults due to new fault mechanisms. Not only transient faults due to particle radiation are becoming a problem, but also wear-out effects on transistors and interconnects. While transient faults can be covered by well-known technologies such as error-correcting...
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