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This work presents a cellular receiver capable of receiving three simultaneous channels with an aggregate bandwidth of 60 MHz, enabling a 300 Mbps downlink rate. The receiver has 16 RF LNA ports covering the cellular bands within the 572–2700 MHz frequency range. It supports LTE-advanced Rel-12 Cat6, HSPA+ Rel-11, TD-SCDMA Rel-9, and GSM/EDGE Rel-9. The 40 nm CMOS receiver consumes 13.7 mA and 17...
This work presents a cellular transceiver capable of transmitting two simultaneous channels with an aggregate bandwidth of up to 40 MHz, supporting a 100 Mbps uplink rate. The transmitter has 8 RF output ports covering the cellular transmit bands within the 572–2100 MHz frequency range. It can support TX LTE-advanced Rel-12 Cat7, HSPA+ Rel-11, TDSCDMA Rel-9, and GSM/EDGE Rel-9. The 40 nm CMOS transmitter...
The feasibility of two-stage Space-Based Solar Power to Tethered Aerostat to Earth (SSP-TA) system architectures that offer significant advantages over conventional single stage space-to-earth architectures is being studied.
A quad-band 2.5G SoC integrates all the RF, DSP, ARM, audio and other baseband processing functions into a single 65nm CMOS die. The radio draws a battery current of 49mA in the RX-mode, and 86mA in the GMSK TX-mode. The low-IF receiver achieves a sensitivity of -110dBm at the antenna, corresponding to a noise figure of 2.4dB at the device input. The 8PSK ±400kHz modulation mask is -64.1/62.7dBc for...
A frequency translation technique exploiting properties of the current-driven passive mixers is presented to implement built-in out-of-band blocker filtering, intended for FDD applications such as 3G. The mathematical findings enable us to optimally size the components for maximal RF front-end gain and minimal noise figure. A prototype zero-IF receiver is fabricated in 65nm CMOS, and achieves a NF...
This radio integrates all the receive and transmit functions required to support a quad-band GSM/GPRS/EDGE application into a single CMOS chip. Compared to the published work, this transceiver is implemented in low-cost digital 0.13 mum CMOS, achieves a superior receive and transmit performance, and yet has up to 2x lower receive power consumption, a key requirement in cellular applications.
This article reviews transmitter topologies for radio transceivers with emphasis on cellular applications. In the first section it discusses different architectures and the challenges in practical implementations. Then it presents a transmitter as part of a fully integrated transceiver for GSM/GPRS/EDGE.
A single-chip multi-band direct-conversion CMOS MIMO transceiver (2 times 2) targeted for WLAN applications is presented. This transceiver is capable of satisfying the requirements of the Enhanced Wireless Consortium and achieves PHY rates of >270Mb/s. The receivers and transmitters achieve an EVM of better than -41 dB (0.9%) and -40dB (1.0%) operating in legacy g and a modes, respectively. From...
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