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As the fabrication technology node shrinks down to 90nm or below, high standby power becomes one of the major critical issues for CMOS high-speed computing circuits (e.g. logic and cache memory) due to the high leakage currents. A number of non-volatile storage technologies such as FeRAM, MRAM, PCRAM and RRAM and so on, are under investigation to bring the non-volatility into the logic circuits and...
In this paper we propose a strategy for better exploiting Multi-Processor Systems-on-Chip resources utilization by means of using a control-loop feedback mechanism. We apply the proposed techniques in a purely distributed memory MPSoC architecture that is composed of a frequency scaling module responsible for tuning the frequency of processors at run-time. Results show very promising in terms of adaptation...
The complexity of MP2SoC architectures to come is such that many issues arise simultaneously, such as multicore programming, system performance, reliability, scalability, etc. The key to solve these issues is self-adaptability: the chips to come have to integrate the required software and hardware means to monitor and self-react to the various kinds of events that are likely to occur during chip's...
Side-Channel Attacks (SCAs) present a serious threat to the security of crypto-systems. In this paper, we show how a pipelined embedded processor opens the door to such attacks. To illustrate our approach, a concrete evaluation of the Xilinx's MicroBlaze soft-core processor is conducted. From these results, we suggest a new masking countermeasure suited for RISC-based architectures. The efficiency...
In this paper, we present a flexible and distributed homogeneous Software Defined Radio (SDR) platform. This platform is an array of processing elements, called Smart ModEm Processors (SMEP), interconnected by a Network-on-Chip. Implemented in ST65nm, each processing element performs 3.2 GMAC/s with 77 GBits/s internal bandwidth while dissipating 110mW. Each SMEP unit contains a MIPS processor for...
Applications like 4G baseband modem require single-chip implementation to meet the integration and power consumption requirements. These applications demand a high computing performance with real-time constraints, low-power consumption and low cost. With the rapid evolution of telecom standards and the increasing demand for multi-standard products, the need for flexible baseband solutions is growing...
The past decades have witnessed tremendous research efforts devoted to parallel architectures and programming models for natively computing in space. This resulted in systems which comprise a number of processing units ranging from compact Boolean function generators (FPGAs look-up-tables) to full-fledged microprocessors (MPSoCs). It is often stated in the literature of both areas that performance...
In this article, we present an original MPI-based adaptive task migration support for the HS-Scale system. Our previous communication API was modified in order to be MPI compliant. In order to enable task migration without any MMU, a Position Independent Code compilation technique is implemented. The self-adaptability is based on monitoring information collected at run-time by each processing element...
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