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A small but persistent signal in wafer slot order was observed at functional test, affecting logic yield. Through wafer slot Randomization at several operations in the route a process step within high-k metal gate formation was suspected to be causing the degrade, but conventional approaches did not reveal the root cause. By combining datamining with a thorough analysis of sector and electrical data...
A small but persistent signal in wafer slot order was observed at functional test, affecting logic yield. Through wafer slot Randomization at several operations in the route a process step within high-k metal gate formation was suspected to be causing the degrade, but conventional approaches did not reveal the root cause. By combining datamining with a thorough analysis of sector and electrical data...
Silicon-Germanium (SiGe), used to boost pFET performance and enhance the properties of high-${k}$ metal gate devices, is grown by selective epitaxy on silicon. Since device parameters depend critically on the deposited SiGe thickness, we apply several advanced techniques to control deposition. Feedback and feed-forward of growth rate data is used to control deposition tools. We also apply a pattern-density...
Embedded SiGe, used to boost pFET performance, is grown by selective epitaxy on silicon. Pattern density effects cause the deposited thickness to be different across different product chips under otherwise identical conditions. Since device control depends critically on thickness, we apply a pattern-density based predictive growth rate, which is used as input for the existing advanced process control...
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