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Many companies understand the value of the Internet of Things (IoT) and invest considerable time, money, and effort to realize its potential. However, every new technology faces a million challenges in its initial phases. IoT also poses some grave issues that need to be tackled well in order to utilize its fullest potential. One of these problems is the microprocessor power consumption. It is a major...
This paper focuses on the production testing of Memristor Ratioed Logic (MRL) XOR gate. MRL is a family that uses memristors along with CMOS inverters to design logic gates. The two-input MRL XOR gate is investigated using the stuck at fault model for the memristors and the five-fault model for the transistors. It is shown that faults in the XOR gate produce analog output voltage values because of...
Field programmable Gate Arrays (FPGAs) are currently being used in the design and implementation of many modern systems. In this paper, the effect of open faults in FPGA switch matrices on the robustness of fault detection mechanisms is investigated. The error detection mechanism is studied in the context of the Duplication With Compare (DWC) technique. The programmable multiplexer with level restorer...
Fault-Tolerance is quickly becoming a very important issue in the design of industrial automation systems. This paper addresses this issue in the context of temporary failures occurring in harsh industrial environments. The Fault-Tolerant design of sensors and controllers is investigated for both the In-Loop and Sensor-to-Actuator architectures. Processing is implemented on FPGAs whenever possible...
This paper proposes an improved DV-hop localization algorithm named an Equal Sub-Area-Based DV-Hop (ESAB-DV-Hop) which achieves less error than an original algorithm. The proposed algorithm derived from the DV-hop method, by dividing the network area to sub-areas and setting the nodes with unknown locations to calculate their positions from anchor nodes in the same sub-area. Simulation results show...
Nowadays, navigation is an important application in smartphones. However, locating a mobile is an imperative task, because the GPS signal is easily corrupted. Pedestrian Dead Reckoning (PDR), is a relative positioning approach using step length and heading estimation. Step length is changing while a pedestrian does different movements. To accurately estimate the step length, we used a model based...
Embedded systems are ubiquitous; imposing a challenge in time to market. Another main challenge during embedded systems development cycle is partitioning the embedded function into SW and HW modules to meet the stringent area, delay and power constraints. The recently-introduced Cairo University PSo-based Hardware/sOftware Partitioning (CUPSHOP) tool was the first HW/SW partitioning tool to employ...
Nowadays, Analog to Digital Converter (ADC) has become the main block of mixed signal circuits. Hence, testing ADC circuits is of great interest. In this paper, a low cost structural test is developed for the Time Domain ADC (TD-ADC). The TD-ADC consists of a Voltage-to-Time Converter (VTC) and a Vernier Time-to-Digital Converter (Vernier TDC). The circuit under test is used in high energy physics,...
Hardware/Software co-design has become one of the main methodologies in modern embedded systems. The HW/SW partitioning problem is a central problem in Hardware/Software co-design. The recently-introduced Cairo University PSo-based Hardware/sOftware Partitioning (CUPSHOP) tool advanced the swarm intelligence optimization techniques to solve this problem. In this paper we introduce an augmented version...
FPGAs are becoming more popular in the domain of safety-critical applications (such as space applications) due to their high performance, re-programmability and reduced development cost. Such systems require FPGAs with self-detection and self-repairing capabilities in order to cope with errors due to the harsh conditions that usually exist in such environments. In this paper, a new dynamic fault recovery...
In Bioinformatics, Motif Finding is defined as the ability to locate repeated patterns in the sequence of nucleotides or amino acids. Identifying these motifs in DNA sequences is a computationally hard problem which requires efficient algorithms.
In recent years, Image classification has been a growing research area in the computer vision field. Thus, many approaches were proposed in literature. Moreover, many content-based image classification approaches are widely used in developing applications and techniques for many areas such as remote-sensing and content-based image retrieval. In this study, we introduce a new technique for content-based...
Protein structure prediction is one of the most important problems in bioinformatics. Protein's secondary structure prediction is a key step in prediction of three-dimensional structure of protein. Despite all the efforts made, so far finding an accurate computational approach to solving a protein structure problem remains a challenging problem. Many computational techniques have been used to predict...
The paper proposed a new motion speed-based adaptive algorithm (MSBAA), it is adaptive to motion speed variations in frames that occur during real time video streaming. The new proposed algorithm selects certain algorithms to be applied on the tested frames according to the type of motion detected in these frames. So in case fast motion is detected in the tested frames, the algorithm selects the fast...
In this paper, we present implementation of object tracking system targeting video sequence based on Particle Swarm Optimization (PSO) using Structural SIMilarity index (SSIM) as PSO's fitness function on field programmable gate array (FPGA). The proposed algorithm's performance has been tested and evaluated over different video sequences, showing its adaption for tracking in real-time. After presenting...
In this paper, a new efficient H.264 intra prediction scheme is introduced. The new prediction scheme is called Best Prediction Matrix Mode (BPMM). The main idea behind the new prediction scheme is to combine the most usable intra prediction modes, {vertical — horizontal — DC}, into a new efficient prediction mode. The performance of our proposed prediction scheme is evaluated using VHDL implementation...
This paper proposes hardware design, modelling and implementation for object tracking system targeting video sequence based on Particle Swarm Optimization (PSO). The system uses Structural SIMilarity index (SSIM) as PSO's fitness function. In this paper, we describe Particle Swarm Optimisation algorithm and Structural SIMilarity index, and then we show how it has been simplified for hardware implementation...
Hardware and Software co-design has become one of the main methodologies in modern embedded systems. The partitioning step, i.e. to decide which components of the system should be implemented in hardware and which ones in software, is the most important step in the embedded systems. Since the costs and delays of the final design strongly depend on partitioning results, there is a need to get an accurate...
Pipelined Analog-to-Digital Converters (PADCs) are one of the main building blocks in communication systems. It is of big interest to find a simple low cost test for the PADC. The purpose of this paper is to find a simple low cost DC test for an N-stage PADC without the need of complex additional circuitry. In order to reach this objective, a new testing technique called Test Input Regeneration (TIR)...
Nowadays, Analog to Digital converters are the main building blocks of mixed analog/digital signal circuits, hence testing ADC circuits has become mandatory. The pipelined Analog-to-Digital Converter (PADC) is widely used with its famous 1.5 bit/stage architecture. In this paper, a low-cost test is developed for a 5 bit PADC. The 5 bits PADC consists of 3-stage (1.5 bit/stage) PADC followed by a 2...
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