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In this paper, we propose a TFET (Tunneling Field Effect Transistor) PMU (power management unit) of R80515 for ultra-low power. Both the dynamic power and leakage power are evaluated by HSPICE circuit simulation with Verilog-A models. From the simulation, we find the dynamic power of TFET circuits can be reduced by 80% and leakage power reduction can be nearly 30% compared with 130nm CMOS (Complementary...
In order to achieve fast IC design, reduce development cycle and cost, Key Lab of Integrated Microsystems in Peking University proposed Array Processing for Unification Architecture(APU) which consists of four kinds of operators: computation, data path, control and MEM operators to replace the configurable logic block in current FPGA fabric. In this paper, a reconfigurable convolution operator based...
This paper presents the implementation of CRC-16 on a novel FPGA, a collection of reconfigurable operators (ReOps), which has smaller configuration bits-stream and better performance than traditional FPGA. A ReOp is a basic block which can process multiple bits data with a specific function set. Considering the complete function set of ReOps, we divide ReOps into eight groups: Arithmetic ReOps, Multiplier...
K-nearest neighbor (KNN) classification algorithm performs slowly for large scale training set and high dimensions. To overcome the disadvantage, we need to focus on the points within a predetermined range, without changing the precision. This method is named Predetermined Range Search (PRS). In this paper, we proposed a method to find the reference distance (ReDist), a parallel and pipelined architecture...
In this paper, we propose a novel architecture of vision chip based on CNN (convolutional neural network) and improve the traditional LeNet-S algorithm. From the results of the experiment and performance, the accuracy of the proposed chip with LeNet-S increased to 97.29%. According to the characteristic of deep pipeline among independent layers of CNN, a 3-stage pipeline CCE (Convolutional Computing...
To overcome drawbacks of the conventional wet Ag/AgCl electrodes, this paper proposed a novel flexible dry electrode with stacked double-micro-domes array for wearable biopotential recording system. By utilizing flexible printed circuit (FPC) substrate and fabrication technologies, we designed a unique structure of a small dome stacking on top of a large dome. Experiments results showed that the proposed...
With the scaling down of MOSFET, the static leakage current increases exponentially since the Subthreshold Swing(SS) is limited by the thermal theory to 60mV/dec. Tunnel field effect transistors based on BTBT have slope Subthreshold Swing and can be used for low power applications. In this paper, InverterFO1, two-input XOR gates and SRAM cell based on III-V heterojunction TFET are designed and evaluated...
Wearable medical devices and smart meters usually need low standby power consumption and ultra-low operating voltage, the shortcoming of traditional CMOS shutoff feature due to sub-threshold swing, limit the size narrowing. TFET devices exhibit ideal static power characteristics in recent research. This paper discusses the design of TFET standard cell library use 0.13-μm CMOS technology and a complete...
Tunnel FETs was selected as the carrier of digital standard cell design since its excellent characteristics in low power consumption. This experiment contains the principle and characteristic of the Tunnel FETs, and specific standard cell circuit design based on the given model. In this design, we completed several combinational logic cells and sequential logic cells, and did the simulation. From...
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