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RF front end modules (FEMs) are currently realized using a variety of technologies. However, since integration drives wireless business in order to achieve the appropriate cost and form factor, CMOS Silicon-on-insulator (SOI) has emerged over the past few years as the dominant technology for RF switches in RF FEMs for cell phones and WiFi [1]. While current performances available on RF SOI technology...
This paper looks back to the development of highspeed BiCMOS technologies in STMicroelectronics for the past 15 years and discusses the perspectives for next generations through the CMOS angle. Opportunities and challenges of nanoscale BiCMOS technologies are reviewed and BiCMOS055 results are presented to demonstrate the feasibility at 55 nm node. Perspectives to offer FDSOI BiCMOS technologies at...
This paper presents the first 55 nm SiGe BiCMOS technology developed on a 300 mm wafer line in STMicroelectronics. The technology features Low Power (LP) and General Purpose (GP) CMOS devices and 0.45 µm2 6T-SRAM bit cell. High Speed (HS) HBT exhibits 320 GHz fT and 370 GHz fMAX associated with a CML ring oscillator gate delay τD of 2.34 ps. Transmission lines, capacitors, high-Q varactors and inductors...
Stress investigations have been carried out on SiGe HBTs from STMicroelectronics BiCMOS9MW technology. The strain created by the stack of metal connections impacts the base bandgap of the transistors: from the reference to the denser dummies structure, a 9.1 meV bandgap energy variation is pointed out. Dummies structures were embedded for both DC and HF characterizations which showed a 25% increase...
This paper summarizes the technological developments carried out in STMicroelectronics to raise the fT / fMAX of SiGe HBTs up to ~ 300 GHz / 400 GHz. The noise and power performance in the W-band of different SiGe HBT generations are compared along with CML ring oscillators and circuit results up to the D band.
The influence of an additional annealing in the base/emitter module fabrication of state-of-the-art DPSA-SEG SiGe:C HBTs is studied in this paper. The objective of this annealing is to reduce the extrinsic base resistance RBx which in previous studies appeared to limit fMAX of DPSA-SEG SiGe HBTs. TCAD simulations and on-silicon measurements are presented for two different base widths. It is shown...
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