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In this paper, we develop a detailed physical model to interpret the dependence of the stress induced leakage current (SILC) distributions on the nature and position of the generated defects, and we exploit it to reconsider in detail previously published experimental data on the statistical distribution of the SILC in Flash arrays. We found that a unique symmetrical spatial distribution of traps,...
In this work, we report experiments on SONOS memory cells aimed to investigate the vertical position and the nature of the charge trapped in the gate stack during program/erase (P/E) cycling. To this purpose a new experimental setup has been developed to accurately detect the amount of injected charge and the consequent threshold voltage shift. The results, confirmed by different measurement techniques,...
In this paper, we analyze the experimental SILC statistical data at low stress reported in (Driussi et al., 2005) . To this purpose we developed an analytical physical model to study the statistical distribution of the TAT current due to single and multiple traps in the gate oxide of a floating gate memory cell. We modeled also the generation dynamics of conductive percolation paths due to more traps...
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