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Design and simulated results of a fully integrated 5GHz CMOS LNAs are presented. To design these LNAs, the parasitic input resistance of a MOSFET is converted to 50Ω by a simple L-C network, hence eliminating the need for source degeneration. As it is analytically shown, this is because the former methods enhance the gain of the LNA by a factor that is inversely proportional to MOSFET's input resistance...
In this paper, we propose a novel 1-bit full adder using hybrid-CMOS logic style. The new full adder is based on a novel XOR-XNOR circuit that generates XOR and XNOR full-swing outputs simultaneously and outperforms its best counterpart showing 28% improvement in power-delay product (PDP). Design of proposed full adder is based on improvement in the PDP and it provides full-swing output with good...
A fully integrated 1.5 GHz low noise amplifier suitable for ultra-low voltage applications is designed and simulated in a standard 0.18µm CMOS technology. Using the folded cascode topology and forward body biasing technique, the proposed LNA works at a very low supply voltage and low power consumption. The proposed LNA has a power gain (S21) of 22 dB with a noise figure of 1.9 dB, while consuming...
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