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A RF LDMOS with an additional P-type implant below channel region is presented to achieve high ruggedness. With the help of this implantation, the device shows significantly improved snapback performance. Besides on-wafer TLP test, we propose a more rigorous ‘open’-circuit test to demonstrate this fantastic robustness. The Faraday shield and drift region is finely engineered to achieve optimum Rds(on)-BV...
In this paper, we present an high performance RF LDMOS transistor based on modified CMOS technology. High power density and low parasitic output capacitance is achieved by the co-optimization among the length of the field plate, the oxide thickness, the drift region doping energy, and the doping and the thickness of epitaxy layer. Excellent characterizations are achieved for Multi-Carrier 3G Base...
In this paper, a wide-band inductor-less LNA for low voltage operation is presented. The input matching is implemented by using a feedback transistor with a resistor terminated to the source to enhance linearity and to reduce noise. Current reuse technique is employed to increase the total transconductance. Under 1V supply voltage and a DC of 5.6 mA, the LNA achieves an average noise figure of 3.2...
Two types of RF LDMOS devices are developed by introducing LDMOS process to standard CMOS fab. The basic device structure is described and the load pull test setup was put up to evaluate the RF performance of both devices. Besides, an impedance transformer was utilized to minimize the mismatch between system and device impedance as well as increase measurement accuracy. The first type is 50V RF LDMOS...
This paper proposes an effective method to improve phase noise in voltage controlled oscillator (VCO), which is realized with 90nm RF CMOS technology. A current source is used in this design to control the VCO power consumption, while the filtering technique is incorporated to reduce VCO phase noise, and a feedback loop from output to input is also adopted to further improve the phase noise performance...
Coplanar waveguides (CPW) are promising candidates for high quality passive devices in millimeter-wave frequency bands. In this paper, CPW transmission lines with and without ground shields have been designed and fabricated on 65nm CMOS technology. A physical-based model is proposed to describe the frequency-dependent per-unit-length L, C, R, and G parameters. Started from a standard CPW structure,...
A 60-GHz injection-locked frequency divider (ILFD) with quadrature outputs is designed in 90-nm CMOS technology. An adaptive-coupling scheme is proposed to enlarge the phase shift for a wide-band locking range. The measured results exhibit an input locking range of 12.1GHz or 20.5%from 52.7 to 64.8GHz at an incident power of 0dBm. The core circuit consumes 8.6mW from a 1.2V power supply and occupies...
An analytical framework has been developed to describe the locking behavior of millimeter (mm) wave current-mode logic (CML) frequency divider. Unlike traditional analysis based on RC delay, the proposed model is established with injection-locking concept from analog perspective. Both analytical formulas and graphic interpretation are provided for design insights. The model has been validated by exhaustive...
This paper presents a full ESD-protected receiver front-end for wireless communications around 24GHz, comprising LNA, mixer, VGA, and on-chip balun. A π-type input matching network incorporating ESD capacitance is constructed to realize the source impedance transformation for higher gain. With it, the gain of the first stage is improved while the noise figure is just degraded slightly. The measured...
Random process variations are often composed of location dependent part and distance dependent correlated part. While an accurate extraction of process variation is a prerequisite of both process improvement and circuit performance prediction, it is not an easy task to characterize such complicated spatial random process from a limited number of silicon data. For this purpose, kriging model was introduced...
The effect of current return path (CRP) on the accurate modeling of single-ended inductors in the millimeter-wave regime has been investigated. A series of spiral inductors with different sizes, shapes, and CRP positions was fabricated in a 0.18-μm RF-CMOS process and measured up to 50 GHz. An analytical appended model for CRP is developed to characterize the effect, and its equivalent circuit is...
A wide tuning range 24GHz VCO (voltage-controlled oscillator) using IBM 90nm CMOS process is presented. Switched inductor and two bits capacitance array offer a widely tuning range. In addition, optimized switches are adopted to improve both tuning range and phase noise performance. Simulation shows that -101dBc/Hz phase noise is achieved at 1MHz offset. The tuning range of the VCO spans from 21.9GHz...
A switchable dual-band low power low noise amplifier operated at 900MHz/1.95GHz has been designed for GSM/TD-SCDMA applications using 0.13 μm CMOS process. To achieve noise matching and input matching at both bands, a tunable capacitance bank and a switchable inductor for L-match are utilized. Four gain modes are accommodated with current splitting technique at the second stage. The post-layout simulated...
An accurate wide-band compact model with proximity effects for on-chip transformers has been developed. According to the physical origin of the elements, method to determine parameters of these elements are offered. Furthermore, a new structure for transformers with high k (coupling coefficient) value has been proposed. Model verification with EM-simulation data of this structure demonstrates the...
A high output power and high efficiency power amplifier (PA) is designed for 60 GHz wireless point-to-point communication using IBM 90 nm CMOS process. A high efficiency is achieved through the utilization of cascode structure with floating n-well and differential inductor to resonate out the parasitic capacitances. To further boost the output power, four PA units are combined together through power...
A low phase-noise 24GHz VCO (voltage-controlled oscillator) for mm-wave WLANs (wireless LANs) using IBM 90nm CMOS process is presented. A current source is used to minimize the impact due to the process variation. Biasing filter technique is adopted to improve the phase noise performance. In addition, optimized switches are proposed to prevent phase noise degradation. Simulation shows that -101dBc/Hz...
Microstrip transmission line (MS), coplanar waveguide transmission line (CPW), grounded coplanar waveguide transmission line (GCPW), slow-wave transmission line with slotted grounded shields (GSCPW), slow-wave transmission line with slotted floating shields (FSCPW) are widely used in the silicon technology. Because the quasi-TEM assumption is still valid in these structures, an equivalent circuit...
In modern integrated circuit (IC) designs with feature size finer than 90nm, the stress among different material layers is playing an important role in determining device performance. The stress can be classified into two categories, stress deliberately introduced during semiconductor process, and stress unintentionally formed through the synergy of different processing steps. Among different types...
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