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Strained Ge p-channel Gate-All-Around (GAA) FETs are demonstrated on 300mm SiGe Strain Relaxed Buffer (SRB) and 45nm Fin pitch with the shortest gate lengths (Lg=40nm) and smallest Ge nanowire (NW) diameter (d=9nm) reported to date. Optimization of groundplane doping (GP) is required to minimize the impact of the parasitic channel in the SRB. The strained Ge GAA devices maintain excellent electrostatic...
This paper brings a comparison of the traps identified in triple-gate FinFETS and Gate-All-Around (GAA) nanowire (NW) MOSFETs built with the same technological process. Traps have been identified using low frequency noise (LFN) spectroscopy, giving information on which process steps may be improved in order to build better devices.
In this work, DC and low frequency noise have been investigated in Gate-All-Around Nanowire MOSFETs at very low temperatures. Static characteristics at 4.2 K exhibit step-like effects that can be associated to energy subbands scattering. The mobility and subthreshold swing are also investigated. Finally the low frequency noise spectroscopy (from 10 K to 70 K) leads to the identification of silicon...
In this study, different S/D contacting options for lateral NWFET devices are benchmarked at 7nm node dimensions and beyond. Comparison is done at both DC and ring oscillator levels. It is demonstrated that implementing a direct contact to a fin made of Si/SiGe super-lattice results in 13% performance improvement. Also, we conclude that the integration of internal spacers between the NWs is a must...
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