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Intelligent computing and maintenance-free powering are two desirable characteristics of wearable IoT devices. Energy harvesting nonvolatile intelligent processor (NIP) with neural network computation capability has the potential to advance these goals. Individual ultraviolet (UV) exposure monitoring progressively becomes one conspicuous application of wearable devices. In resource constrained wearable...
With the coming of ‘Big Data‘ era, high-energy-efficiency database is demanded for the Internet of things (IoT) application scenarios. The emerging Resistive Random Access Memory (RRAM) has been considered as an energy-efficient replacement of DRAM for next-generation main memory. In this paper, we propose an RRAM-based SQL query unit with process-in-memory characteristic. A storage structure for...
Convolutional Neural Network (CNN) has become one of the most successful technologies for visual classification and other applications. As CNN models continue to evolve and adopt different kernel sizes in various applications, it is necessary for the hardware architecture to support reconfigurability. Previous FPGAs and programmable ASICs are fine-grained reconfigurable but with energy efficiency...
Neural network accelerators have been extensively studied for artificial intelligent applications for recent years. Analogto-information systems (AIS), which could accelerate neural network computation in analog domain, are considered as one better alternative for achieving higher scalability and energy efficiency. Unlike operating in the digital domain, an AIS adopts analog computing units to construct...
AICNN architecture is presented in this work to map the state-of-the-art machine-learning algorithms of CNN to power-constrained embedded hardware. As the combination of analog-to-information conversion and typical CNN algorithms, AICNN can realize ultra-highly efficient computation by using massive parallel analog signal processing circuits, which could also significantly reduce ADC devices cost...
An energy-efficient nonvolatile intelligent processor (NIP) is proposed for battery-less energy harvesting system. This NIP employs RRAM-based nonvolatile logics (NVL) with self-write-termination (SWT) scheme and low-power processing-in-memory (PIM) to achieve energy-efficient computing against frequent power-off situations. An NIP test chip was fabricated in 150nm CMOS process using HfO RRAM. This...
An energy-efficient nonvolatile intelligent processor (NIP) is proposed for battery-less energy harvesting system. This NIP employs RRAM-based nonvolatile logics (NVL) with self-write-termination (SWT) scheme and low-power processing-in-memory (PIM) to achieve energy-efficient computing against frequent power-off situations. An NIP test chip was fabricated in 150nm CMOS process using HfO RRAM. This...
This paper proposes a FeRAM-based Nonvolatile SOC (NVSOC) to obtain system-level startup acceleration and energy efficiency enhancement for normally-off applications. The NVSOC supports adaptive parallel recovery and two fast startup schemes. The quick power-on detection is enabled by hysteresis-comparator based voltage detector and leakage cutoff controller. A nonvolatile radio frequency controller...
Flexible electronic is a promising technology for flexible and large-area sensing IoT applications, where ADC is a fundamental component This paper proposes a configurable and flexible VCO-based ADC, implemented with Oxide Thin-Film Transistors(TFT) technology. A VCO with four connecting modes is designed to configure the VCO-based ADC working under different power and resolutions. An Inkjet printing...
A prototype of fully flexible intelligent contact lens, which are shown in the impressive action movie series of “MISSION: IMPOSSIBLE”, has become the Possible Mission in this work. Hereon, the system adopts analog-to-information processing method to build a specific Multi-Layer Perceptron network for image classification tasks with flexible devices and circuits, where the information is extracted...
The globalization of the semiconductor industry has caused many challenges to prevent intellectual property (IP) piracy. Logic encryption is an effective technique for hardware IP protection. Researchers have proposed various logic encryption techniques, which introduce large overheads in delay, power and area. This paper aims to significantly reduce these overheads by proposing a novel gate replacement-based...
Emerging memory devices enable performance improvements in memory applications and make possible chip designs using beyond von Neumann architectures. This paper explores the use of emerging memory devices in applications of nonvolatile logics and neuromorphic computing, and provides a review of several silicon examples of nonvolatile logics. This paper also discusses the challenges involved in the...
Thin-film transistor (TFT) circuits are important for flexible electronics which are promising in the area of wearable devices. However, most TFT technologies only have unipolar devices and the process variation and defective rate are relatively high, which impose challenges to TFT circuit design. In this paper, we propose a novel logic array based on pseudo-CMOS logic to address the problem of unipolar...
The training of neural network (NN) is usually time-consuming and resource intensive. Memristor has shown its potential in computation of NN. Especially for the metal-oxide resistive random access memory (RRAM), its crossbar structure and multi-bit characteristic can perform the matrix-vector product in high precision, which is the most common operation of NN. However, there exist two challenges on...
In this paper, we propose a novel patient-specific electrocardiogram (ECG) classification algorithm based on the recurrent neural networks (RNN) and density based clustering technique. We use RNN to learn time correlation among ECG signal points and to classify ECG beats with different heart rates. Morphology information including the present beat and the T wave of former beat is fed into RNN to learn...
The emerging metal-oxide resistive switching random-access memory (RRAM) devices and RRAM crossbar arrays have demonstrated their potential in enormously boosting the speed and energy-efficiency of analog matrix-vector multiplication. Unfortunately, due to the immature fabrication technology, commonly occurring Stuck-At-Faults (SAFs) seriously degrade the computational accuracy of RRAM crossbar based...
Recent progress in the machine learning field makes low bit-level Convolutional Neural Networks (CNNs), even CNNs with binary weights and binary neurons, achieve satisfying recognition accuracy on ImageNet dataset. Binary CNNs (BCNNs) make it possible for introducing low bit-level RRAM devices and low bit-level ADC/DAC interfaces in RRAM-based Computing System (RCS) design, which leads to faster read-and-write...
Recent nonvolatile flip-flops (nvFFs) enable the parallel movement of data locally between flip-flops (FFs) and nonvolatile memory (NVM) devices for faster system power off/on operations. The wide distribution and long period in NVM-write times of previous two-NVM-based nvFFs result in excessive store energy (Es) and over-write induced reliability degradation for NVM-write operations. This work proposes...
As convolutional neural network (CNN) has been used more and more widely, such as in areas of images classifications and face recognition, the traditional CPU or GPU platforms have been insufficient to support the efficient operation of increasingly complex CNN. Therefore, heterogeneous computing platform is increasingly used to accelerate CNN, which contains a host and one or more computing devices,...
This paper presents a compare-and-select (CaS) error tolerant scheme for nonvolatile processors (NVPs). Nonvolatile flip-flops (NVFFs), used in NVPs suffer from the faults caused by nonvolatile devices. Conventional error tolerant methods are designed for centralized memory macros and are inefficient for distributed NVFFs. In our CaS scheme, we use the read-write-read-compare strategy to get the error...
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