The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This special plenary session will celebrate Prof. McCluskey (who passed away in 2016) through three keynote speeches by world-renowned scholars on the next wave of pioneering innovations, starting with a memorial speech by Prof. Jacob Abraham of University of Texas at Austin.
Advances in photonics, flexible electronics, emerging memories, etc. and Si electronics' integration with these devices have enabled new classes of integrated circuits and systems with enhanced functionality, higher performance, or lower power consumption. Driving greater integration of such heterogeneous X-tronics can facilitate the continued proliferation of low-cost micro-/nano-systems for a wide...
Biology is soft, curvilinear and transient; modern semiconductor technologies are rigid, planar and everlasting. Electronic and optoelectronic systems that eliminate this profound mismatch in properties create opportunities for devices that can intimately integrate with the body, for diagnostic, therapeutic or surgical function with important, unique capabilities in biomedical research and clinical...
The progress of digital system design and production technologies have produced social innovation by Information Communication Technology (ICT). Most social systems and our daily lives are fully supported by ICT. The progress has been accelerated exponentially and destructive innovations have occurred in various fields in industries and societies. Governments emphasize Industry 4.0 or Society 5.0...
A W-band ultra-high data-rate (56Gb/s) wideband (68–102GHz) 65nm bulk CMOS wireless transceiver is presented. Frequency interleaving by two up-converted IF data signals using 68 and 102GHz LO to W-band is applied to achieve wideband and a world-record 56Gb/s wireless communications on CMOS. 16QAM modulation is used for 6.5GHz (26Gb/s) low-band and 7.5GHz (30Gb/s) high-band data. Transmitter/receiver...
1,000 fps motion vector (MV) estimation and classification engine for highspeed computational imaging in a 3D stacked imager/processor module is proposed, prototyped, assembled, and also tested. The module features 1) ThruChip interfaces for high fps image transfer, 2) orders of magnitude more area/power efficient MV estimation architecture compared to conventional ones, and 3) a cognitive classification...
Targeting the spatial-modulation (SM) MIMO systems, a symbol detector is designed, implemented, and verified. The detector is designed based on a low-complexity dual datapath architecture performing the modified signal-vector-based list detection. Implemented in 0.18μm CMOS, the detector occupies 1.85mm2 and shows the throughput of 686Mbps for 16 × 4 256-QAM SM-MIMO systems. Evaluated under a hardware-in-the-loop...
This paper presents a time-domain biosensor array that uses a capacitor-less current-mode analog-to-time converter (CMATC) and logarithmic cyclic time-attenuation-based TDC with discharging acceleration. Combining the exponential function of the CMATC and logarithmic function of the proposed TDC offers linear input-output characteristics. The time-domain property enables bio-imaging at a high spatial...
This paper presents an HDL-synthesized injection-locked phase-locked loop using LC-based DCO for on-chip clock generation. The superior noise performance of the LC-DCO enables the proposed synthesizable PLL to achieve top performance among the existing designs. Fabricated in a 65nm CMOS process, this prototype demonstrates a 0.142ps integrated jitter at 3.0GHz and consumes 4.6mW while only occupying...
This paper presents a prototype of 14bit 80kSPS non-binary cyclic ADC without high accuracy analog components and complicated digital calibration. Since the redantancy of non-binary ADC tolerates the non-idealities such as capacitor mismatch and finite amplifier gain, the design consideration of this high accuracy ADC are be focused on the capacitance of sampling capacitor to satisfy the overall kT/C...
A proof-of-concept non-binary cyclic ADC with proposed correlated level shifting (CLS) technique is designed and fabricated in 90nm CMOS technology. By applying the odd/even structure to a multiplying digital-to-analog converter (MDAC), the amplifier with CLS can be used for a cyclic ADC, so that the allowable dynamic range of the proposed cyclic ADC almost is doubled comparing to the conventional...
A current-integration-based CMOS amperometric sensor with a bacteria-sized (1.2 μm × 2.05 μm) electroless-plated microelectrode array for high-sensitivity bacteria counting is presented. For high-sensitivity bacteria counting with sufficient SNR, noise must be reduced because the bacteria-sized microelectrode can handle only small current on the order of nA. The proposed current integration can reduce...
This paper presents an object detection accelerator that features many-scale (17), many-object (up to 50), multi-class (e.g., face, traffic sign), and high accuracy (average precision (AP) of 0.81/0.72 for AFW/BTSD datasets) detection. Employing 10 gradient/color channels, integral features are extracted and 2,000 simple classifiers for rigid boosted templates are adaptively combined to make a strong...
This paper proposes a breakdown-pixel-extraction architecture for SPAD sensor. The proposed readout circuit detects the breakdown pixels and their addresses are readout. Therefore, under the faint light environment, this SPAD sensor significantly improves the data readout efficiency. A 15 × 15 SPAD sensor was fabricated in a 0.18 um CMOS process, and a high speed readout is verified by measurement.
This paper presents an energy-autonomous bio-sensing system with the capability of wireless communication. The proposed system includes a biofuel cell as a power source and sensing frontend associated with the integrated supply-sensing sensor. The sensor consists of a digital-based gate leakage timer, supply-insensitive time-domain temperature sensor, and inductive-coupling transmitter. A test chip...
A CMOS active diode rectifier for wireless power transmission with proposed voltage-time-conversion (VTC) delay-locked loop (DLL) control suppresses reverse current by realizing zero-voltage switching (ZVS), regardless of AC input and process variations. The proposed circuit is implemented in a standard 0.18μm CMOS process using I/O MOSFETs, which corresponds to 0.35μm technology. The maximum power...
A pulse generator (PG) for low power and low duty cycle applications is presented. The PG employs a CMOS switch and a quarter-wavelength transmission line resonator. Since the architecture does not involve feedback gain, the PG is theoretically capable to generate a pulse efficiently at high oscillation frequency (fosc), at which a transistor gain is limited. The PG also features a quick starting...
A 13.56 MHz 64.8 mW fully-integrated CMOS active rectifier for biomedical wireless power transfer system is presented in this summary. It employs an adaptive on/off delay compensation technique to accurately compensate for the circuit delays despite PVT variations and mismatches. With an AC input that ranges from 1.8 V to 3.6 V, the measured voltage conversion ratio is higher than 90% and the measured...
A wireless power receiver using a 3-level reconfigurable resonant regulating (R3) rectifier is presented in this summary. The receiver improves power conversion efficiency and reduces die area and off-chip components by achieving power conversion and voltage regulation in one stage, using only 4 on-chip power switches and 1 off-chip capacitor. The receiver regulates the output voltage at 5 V and delivers...
We propose a sub-1-μs start-up time, fully integrated 32-MHz relaxation oscillator (ROSC) for intermittent VLSI systems. Our proposed ROSC employs current mode architecture that is different from conventional voltage mode architecture. This enables compact and fast switching speed to be achieved. The measurement results demonstrated that the ROSC achieved sub-1-μs start-up time and generated stable...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.