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Sepsis associated encephalopathy (SAE) represents a diffuse and/or multifactorial cerebral dysfunction during response to systemic infection. Study aim was to compare clinical and electroencephalogram (EEG) characteristics and intrahospital survival rate among SAE patients.A prospective study, during 42 months’ period, included 39 SAE patients assigned in two groups according the outcome (survival:...
We present a design of a radix-8 complex division for fixed-point operands suitable for FPGA implementation. The design, consisting of operands' prescaling and digit recurrence, shares logic resources and optimizes the use of 6-input LUTs of FPGA devices for efficient design. An optimized single table for prescaling factors is developed. The design is implemented in Altera Stratix-II FPGA for several...
We present a design and implementation of a radix-4 complex division unit with prescaling of the operands. Specifically, we extend the treatment of the residual bound and errors due to the use of truncated redundant representation. The requirements for prescaling tables are simplified and a detailed specification of the table design is given. All principal components used in the design are described...
We present a radix-10 digit-recurrence algorithm for division using limited-precision multipliers, adders, and table-lookups. We describe the algorithm, a design, and its FPGA implementation. The proposed scheme is implemented on the Xilinx Virtex-5 FPGA device and we obtained the following characteristics: for n = 7, delay is ap 105ns and the cost is 782 LUTs. For n = 14, the implementation has a...
In this paper we extend the domain of applicability of the E-method [7, 8], as a hardware-oriented method for evaluating elementary functions using polynomial and rational function approximations. The polynomials and rational functions are computed by solving a system of linear equations using digit-serial iterations on simple and highly regular hardware. For convergence, these systems must be diagonally...
A digit-by-digit arithmetic method in computing certain functions, such as cube roots, suitable for FPGA technologies, is presented. In the radix-2 case, this method uses only simple primitive operations such as carry-propagate addition/- subtraction, doubling, and halving. Details of the radix-2 method applied to computing cube root and its square are discussed. Rough estimates of delay and cost...
A hardware-oriented method for evaluating complex polynomials by solving iteratively a system of linear equations is proposed. Its implementation uses a digit-serial iterations on simple and highly regular hardware. The operations involved are defined over the reals. We describe a complex-to-real transform, a complex polynomial evaluation algorithm, the convergence conditions, and a corresponding...
We present a method and organization of an arithmetic array processor for solving tridiagonal systems of linear equations. The method uses online arithmetic approach which allows parallel computation of the result digits of the solution vectors. The basic operators are digit-vector by digit multiplication and redundant addition which results in precision-independent cycle time. The method takes about...
In this paper, we present an implementation for the Complex Householder Transform, using complex number on-line arithmetic, based on adopting a redundant complex number system (RCNS) to represent complex operands as a single number. We present comparisons with (i) a real number on-line arithmetic approach, and (ii) a real number arithmetic parallel approach, to demonstrate a significant improvement...
A three-dimensional vector normalizer based on pipelined on-line arithmetic is presented. The clock period is kept small by the use of redundant adders and low-precision estimates. The throughput is greatly improved by unfolding and pipelining on-line units and the area is reduced due to left-to-right processing. Assuming the same area/delay metric, the proposed scheme can improve throughput by 89%...
In this article we describe a derivation and an algorithm for on-line multiplicative normalization of fractions. The algorithm is a variation of the continued product normalization algorithm and it is used for on-line evaluation of elementary functions.
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