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This paper presents an ultra low-power transceiver for 20-Gb/s backplane communications. Incorporating half-rate, power-saving transmitter and full-rate, high-speed receiver with 2-stage equalization, this work achieves 21 Gb/s with BER≪10−12 over a 40-cm (16-inch) regular FR4 channel, while consuming a total power of only 87 mW from a 1.2-V supply.
A 2.4 GHz fully-integrated MISO transceiver consisting of two receivers and one transmitter is implemented in 0.18 mum CMOS technology. To alleviate the cost of external front-end components, the RF transmit/receive (T/R) switch and a power-efficient linear CMOS PA are fully integrated on-chip. It shows 3.5 dB low noise figures in the receivers respectively. Also, the transmitter delivers an average...
This work presents a single channel (cable) prototype lOGBase-T transceiver fabricated in a 90nm CMOS process. A 1.2V/3.3V dual supply is used. The transmitter, consuming 93.7mW, features a class- AB line driver using an AC coupled bias and a common-mode (CM) compensation capacitor transparent to the differential-mode (DM) path to achieve high efficiency. It achieves 59.51dB SFDR for a test signal...
A low-power fullband 802.11a/b/g WLAN transceiver in 0.15-mum CMOS technology is described. The zero-IF transceiver achieves a receiver noise figure of 4.4/4 dB for the 2.4-GHz/5-GHz bands, respectively. The corresponding sensitivity at 54-Mb/s operation is -72 dBm for 802.11g and -74 dBm for 802.11a using actual PER measurement. An on-chip PA delivers 20 dBm output P1-dB. A new I/Q compensation scheme...
A direct-conversion RF transceiver and digital PHY are integrated in a single 0.13mum digital CMOS chip. Designed for UWB OFDM operation as proposed by the WiMedia Alliance, the device supports both fixed and frequency-hopped modes in the band of 3.1 to 4.8GHz. The RF transceiver draws 100mA in receive mode and 70mA in transmit mode, and the complete chip occupies 17mm2
A low-power full-band 802.11abg transceiver in 0.15mum CMOS technology is presented. It shows 4.4/4dB low noise figures in 2.4/5GHz receiver chains. An on-chip PA (power amplifier) delivers 20dBm output P 1dB -40 to 140degC operation temperature is achieved by sensing technique. On-chip power detector and transmitter to receiver feedback loop estimate I/Q imbalance, and a new I/Q compensation scheme...
A direct-conversion UWB transceiver for mode 1 OFDM applications employs three resonant networks and three PLLs. Designed in a 0.13 /spl mu/m CMOS technology, the transceiver provides a total gain in the range of 69 to 73 dB, an NF in the range of 5.5 to 8.4 dB across three bands, and a TX P/sub 1dB/ of -10 dBm. The circuit consumes 105 mW from a 1.5 V supply.
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