The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Compressively strained Si 1−x Ge x band-to-band tunneling field effect transistors (TFETs) with planar structure are fabricated and analyzed. Different germanium concentrations of x=0.35, 0.50 and 0.65 are investigated. An HfO 2 /TiN high-κ/metal gate stack is used for a better electrostatic control. The fabricated Si 0.5 Ge 0.5 devices show the highest...
Future CMOS technology generations require novel materials in the front end of device fabrication to overcome physical limits of the classical silicon/silicon dioxide based system and to keep control over channel charge: 1.) High-k dielectrics and metal gate electrodes enable scaling of the equivalent oxide thickness maintaining reasonable gate leakage currents. 2.) Thin, fully depleted silicon on...
In this abstract, the impact of series resistance on mobility extraction in conventional and recessed-gate ultra thin body (UTB) n-MOSFETs is investigated. High series resistance leads to an overestimation of the internal source/drain voltage and influences the measurement of the gate to channel capacitance. A specific MOSFET design that includes additional channel contacts and recessed gate technology...
Strained silicon on insulators (sSOI) wafers with a supercritical thickness of 58 nm were produced using thin strain relaxed SiGe buffer layers, wafer bonding, selective etch back and epitaxial overgrowth. Raman spectroscopy revealed an homogeneous strain of 0.63 plusmn 0.03 % in the strained Si layer. Long channel n-type SOI-MOSFETs showed very large electron mobilities up to 1200 cm2/Vs in the strained...
Two process concepts for integration of novel gate stacks with epitaxial high-k dielectrics and metal gate electrodes are presented. A "gate first" process based on a planar gate stack on ultra thin SOI material has been used for successful fabrication of MOSFETs with TiN/Gd 2O3 gate stack. Furthermore MOSFETs with W/Gd2O3 gate stack have been fabricated with a replacement gate process....
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.