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To realize a Software Defined Radio covering the mainstream 0.5–6 GHz wireless communication bands, new SAW-less radio receiver architectures are being explored which realize selectivity in a more flexible and programmable fashion. N-path filters and mixer-first receivers can offer high-linearity high-Q RF-filtering around a center frequency defined by a digital clock, which offers the desired flexible...
The International Series in Engineering and Computer Science
Low Noise Amplifiers (LNAs) are commonly used to amplify signals that are too weak for direct processing for example in radio or cable receivers. Traditionally, low noise amplifiers are implemented via tuned amplifiers, exploiting inductors and capacitors in resonating LC-circuits. This can render very low noise but only in a relatively narrow frequency band close to resonance. There is a clear trend...
This paper describes a frequency-agile RF front-end in 65nm CMOS targeting short-range full-duplex wireless communication. Complementing previous work on a self-interference cancelling receiver, this work describes the co-integrated transmitter and reports the phase noise advantages of using correlated clock resources to clock all up- and downconverters present in the system. The hardware is capable...
A new reconfigurable linearized low noise transconductance amplifier (LNTA) design for a software-defined radio receiver is presented. The transconductor design aims at realizing high linearity at RF in a way that is robust for Process, Voltage and Temperature variations. It exploits resistive degeneration in combination with a floating battery by-pass circuit and replica biasing to improve IIP3 in...
This paper describes a combination of a Weaver mixer and an N-path filter for a superheterodyne receiver with a reconfigurable frequency plan. It uses an N-path topology driven with two different frequencies, effectively realizing a frequency shift together with band-pass filtering. To reduce transfers via harmonics other than the fundamental, a harmonic rejection scheme is used. A 28nm FDSOI CMOS...
A dual RF-receiver preceded by discrete-step attenuators is implemented in 65nm CMOS and operates from 0.3–1.0 GHz. The noise of the receivers is reduced by cross-correlating the two receiver outputs in the digital baseband, allowing attenuation of the RF input signal to increase linearity. With this technique a displayed average noise level below −169 dBm/Hz is obtained with +25 dBm IIP3, giving...
Practical time delay circuits do not have a perfectly linear phase-frequency characteristic. When these delay circuits are applied in a phased-array system, this frequency dependency shows up as a frequency dependent beam direction (“beam squinting”). This paper quantifies beam squinting for a linear one-dimensional phased array with equally spaced antenna elements. The analysis is based on a (frequency-dependent)...
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