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Flash Lamp Annealing (FLA) is a well-known process for activation annealing in ultra-shallow junctions. Since our FLA tool has a flexible flash function that allows adjustments of the order of milliseconds, it is possible to realize precise diffusion control in the nanometer range. With soak pulse FLA the junction depth (Xj) can be easily controlled by the soak pulse time while achieving a high activation...
In this paper, we report on the formation of shallow junctions with high activation in both n+/p and p+/n Ge junctions using ion implantation and Flash Lamp Annealing (FLA). The shallowest junction depths formed for the n+/p and p+/n junctions were 9.5 nm and 10.7 nm with sheet resistances of 620 ohms/sq. and 414 ohms/sq., respectively. Additionally, by reducing knocked-on oxygen during ion implantation,...
We demonstrate the formation of n+/p ultra-shallow junctions in Ge using Flash Lamp Annealing (FLA). With FLA both shallow junctions and high activation can be achieved, for example, a sheet resistance of 400 ohms/sq with a junction depth of 20 nm. The shallowest junction depth was 17 nm with a sheet resistance of 493 ohms/sq. In addition, by varying the FLA conditions, i.e., the temperature and annealing...
We have developed a carbon absorber process to reduce the pattern effect. This process consists of deposition of carbon, flash lamp annealing (FLA) in an oxygen ambient and SPM-APM wet cleaning. The feature of this process is that the carbon absorber equalizes the light absorption from flash lamps macroscopically and microscopically on the annealed wafer. As a result, we can suppress the pattern effect...
We investigated the influence of extremely high doping concentrations on the sheet resistance of ion implants annealed by FLA. As the implant depth was ultra-shallow and the amount of dopant atoms high, the concentration of dopant near the surface was exceedingly high, above the solid solubility limit, resulting in high Rs. The cause of this is mainly due to the formation of clusters, which was confirmed...
We have presented functional annealing data using the FSP-FLA (flexibly-shaped-pulse flash lamp annealing), together with some examples of the multi-functionality. First, we showed that the FSP-FLA can control thermal budget whilst sustaining high dopant activation, recovering crystalline defects, and controlling thermal diffusion length. Secondly, by combining impulses from conventional FLA and the...
We propose the suitable FLA method for pFET device activation by using flexibly-shaped-pulse FLA (FSP-FLA). For the activation annealing by FLA on B without pre-amorphous implantation (PAI) process, increase in preheat temperature before flash is the most effective. By using FSP-FLA, ~1000degC 10-ms preheat was performed. It achieves very shallow and high activated junction without PAI equivalently...
This paper describes a fabrication process that uses flash-lamp annealing (FLA) and the characteristics of the CMOS transistors that are constructed with an ultralow-thermal- budget process tuned for 45-nm metal/high-k FETs. FLA enhances the drivability of pFETs with the solid-phase epitaxial (SPE) extension junction, but reducing the thermal budget deteriorates the poly-gate depletion and the electron...
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