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This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and the automatic artifacts removal system based on BSS-CCA method and Steady-State Visual Evoked Potential (SSVEP). Through six frequency bands (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose...
This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six buttons (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose the number by gazing at the computer interface. This proposed EEG (Electroencephalography)...
This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six frequency bands (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose a phone number by gazing at the display interface. This proposed...
In this paper, the 32-channel readout front-end device with a Bluetooth 2.0 module and a MSP430 ultra-low power microcontroller for portable Electroencephalograph (EEG) acquisition is presented. In addition to the consideration of low power, low noise, and high efficient chip area usage, the extendable readout front-end chip is presented with a design of chopper-stabilized differential difference...
This paper presents a parallel VLSI architecture of a singular value decomposition (SVD) processor for real-time multi-channel electroencephalography (EEG) System. In the recent years, EEG has been widely applied on engineering research, medical diagnosis, and so on. More and more studies regarding brain-computer interface (BCI) and other related applications have been published. In order to increase...
Financial derivative valuation is the key of the adoption of the International Financial Reporting Standards (IFRS), which are based on fair value accounting. When the derivatives do not have an active market, the inputs and methods for estimating their fair value will be more subjective and, the derivative valuation will be less reliable. The goal of this research is to design a derivative valuation...
This paper presents a 4-channel ICA implementation in the separation of EEG signals for on-line monitoring and analysis of brain functionalities. A novel ICA architecture utilizing mixed sequential, pipelined, and parallel processing units and employing interleaved and circular-based RAM modules to achieve hardware-efficient design is presented. The ICA processor is fabricated using UMC 90nm High-Vt...
This paper presents a complexity-efficient architecture for an EEG signal separation processor incorporating ICA with lossless data compression. An average correlation result of 0.9044 is achieved while transmitted EEG data bandwidth and power consumption are reduced by 41.6%. The chip area, operating frequency, and estimated power consumption of the proposed EEG architecture in UMC 90nm SP-HVT CMOS...
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