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Power consumption of Network-on-Chip (NoC) is becoming more important in many core processors. Input buffers utilized in routers consume a significant part of the total power of NoCs. In order to reduce this power consumption, a novel power efficient memory called Marching Memory Through type (MMTH) is introduced. By connecting transparent latches in tandem, MMTH achieves high speed operation with...
We have concluded that with a router using MMTH the power consumption is associated with the bit change rate of the data, and when NAS parallel benchmarks work on NoC, it is reduced by 42.4% on average at 2GHz compared with a traditional FIFO implementation. The performance degradation caused by the delay of the reading time can be mostly saved by the look-ahead technique in the router.
An SIDO boost DC-DC converter operating with a wide input voltage range is proposed for sensor network applications. As the input voltage becomes lower, the inductor current is restricted by on-resistance of a driver transistor. Therefore, longer Ton period does not indicate a lager inductor current. In this condition, Ton period for the lowest input voltage operation is determined as the inductor...
A compact on-chip SIDO DC-DC converter is proposed for portable equipments operating with a battery or a solar cell. A current up to 30mA is supplied with own transistors in an internal drive mode and more than 100mA by utilizing external power transistors in an external drive mode. The efficiencies are 85% and 84% for each case. A cross regulation problem is solved by inserting an extra cycle before...
An on-chip low power single-inductor dual-output (SIDO) DC-DC boost converter is proposed for battery and solar cell operating sensor network applications. A proposed feed forward control determines the Ton/Toff ratio precisely for each output without any compensation or linear capacitor. This feature helps reduce the costs of the external components and utilize an inexpensive process technology....
An on-chip low power single-inductor dual-output DC-DC converter is proposed for battery and solar cell operating sensor network applications. By a new feed-forward control, a test chip fabricated by 190nm CMOS achieves a high efficiency of 87% at the practical load condition with a small area size of 0.75mm2 without any compensation capacitor. In addition, the fluctuation of the output voltage remains...
This paper presents embedded use DC-DC boost converters for battery operating micro-computers. Pulse frequency modulation (PFM) is employed for fast response. A new control method is applied to improve the efficiency by regulating the inductor current optimally from both of input voltage and load current. A synchronous rectifier converter fabricated by a 180nm CMOS technology achieves the efficiency...
A complementary half swing architecture is proposed for the high speed and low power bus operation. The bus is composed from a pair of lines. Each bus line within a pair utilizes the upper or lower half of the supply voltage exclusively. The architecture is applied to an embedded SRAM of the 0.5??m CMOS ATM switch LSI. Simulation results indicate that it operates beyond 200MHz at the supply voltage...
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