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As the rapid progress of memristor technology continues, multi-layer stacking of these crossbars is needed in order to maximize the use of vertical space and achieve the required density for high throughput applications. This work summarizes our efforts of designing and building three-dimensional monolithically integrated memristive arrays and crossbars, both standalone and onto CMOS chips. We discuss...
We have fabricated and successfully tested, for the first time, a prototype chip of a Race Logic computing paradigm, which makes positive use of race conditions for accelerating a broad class of optimization problems, such as ones solved by dynamic programming algorithms. In Race Logic, information is encoded in signal propagation delay, rather than conventional logic levels, and the result of the...
By encoding information as digital signal propagation delay, rather than conventional logic levels, some basic processing operations become exceedingly energy efficient to implement. The result of such a computation can then be observed by relative timing differences between injected signals. We demonstrate the embodiment of such an approach utilizing current starved inverters as delay elements and...
As Moore's law scaling approaches its physical limit, there is increased interest in memristors as a replacement to transistors in memory applications due to their smaller footprint and superior scaling characteristics. However, memristors are intrinsically two-terminal devices, requiring an underlying CMOS control interface for proper operation. Thus the integration of CMOS and memristors is essential...
Memristors are emerging as powerful nanoscale devices for diverse applications, such as high-density memories and neuromorphic applications. However, this nascent technology requires considerable advancement before this vision is realized. We present a highly configurable CMOS interface chip which enables the characterization of on-chip memristors, especially for memory applications. The chip was...
This article proposes a novel computing approach, dubbed race logic, in which information, instead of being represented as logic levels (as in conventional logic), is represented as a timing delay. Under this new representation, computations are based on the observation of the relative propagation times of signals injected into the circuit (that is, the outcome of races). Race logic is especially...
We propose a novel computing approach, dubbed “Race Logic”, in which information, instead of being represented as logic levels, as is done in conventional logic, is represented as a timing delay. Under this new information representation, computations can be performed by observing the relative propagation times of signals injected into the circuit (i.e. the outcome of races). Race Logic is especially...
A simple two-terminal memristive device has excellent scaling properties. For example, devices with footprint below 10×10 nm2 have been recently demonstrated and crossbar structures provide means of sustaining memristor density in large-scale circuits. While taking advantage of high density memristive devices is relatively straightforward in crossbar memory circuits, doing so efficiently in digital...
A simple two-terminal memristive device has excellent scaling properties. For example, devices with footprint below 10×10 nm2 have been recently demonstrated and crossbar structures provide means of sustaining memristor density in large-scale circuits. While taking advantage of high density memristive devices is relatively straightforward in crossbar memory circuits, doing so efficiently in digital...
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