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Multi-clock systems are quite used in nowadays designs. What this paper propose is a way to convert Simulink models into system based on different synchronization assumptions, i.e., synchronous and asynchronous, and to provide a way to allow communications between these two domains.
This paper describes how simulation across multi-abstraction level problem has been solved in CodeSimulink environment, a high-level design tool for FPGAs and DSPs. We detail how we achieve the desired behavior at almost every considered level (i.e., Simulink, RTL and on-chip). We also show some results on simple applications to validate the approach.
This paper describes an approach to the placement of self-timed circuits onto commercial FPGAs, using only conventional synchronous tools available on the market. Different parts of the design are constrained in order to maintain the timing relationship required for guaranteeing the correct circuit functionality and to keep the wiring influence on system delays bounded and fixed across the different...
One of the reasons that prevents digital designers to adopt asynchronous design methodologies is the lack of high level design tools that are available for asynchronous design. Nowadays, it is quite common to use Simulink, from The Mathworks, as a modeling tool and then to synthesize the developed diagram into RTL code automatically. In the synchronous domain some tools are able to synthesize such...
Asynchronous design has become more and more popularin last years. Many tools and design methodologies have been developed for this kind of circuits. Unfortunately only few of them are focused on their implementation onto FPGAs. Nowadays FPGAs are widespread in many applications and they have enough complexity to allow prototyping also complex designs. For this reason this paper is focused on the...
Many universities are now involved in projects related to design, assembly, and operation of small satellites. These projects, with participation of researchers and students, and support of external companies, do not aim to compete with commercial satellites; the main goal is to increase the experience level which contributes to make space applications affordable also to small organizations. For students,...
This paper describes how a ferroelectric RAM from Ramtron has been used to increase the reliability of PiCPoT, a small satellite developed at Politecnico di Torino for educational purposes. It compares the FeRAM solution with respect to a FLASH one. The memories are used for saving housekeeping telemetry data while the satellite is far from the ground station. Due to the intrinsic radiation tolerance...
This paper describes how a ferroelectric RAM from Ramtron has been used to increase the reliability of PiCPoT, a small satellite developed at Politecnico di Torino for educational purposes. It compares the FeRAM solution with respect to a FLASH one. The memories are used for saving housekeeping telemetry data while the satellite is far from the ground station. Due to the intrinsic radiation tolerance...
This paper introduces a methodology for using self- timed logic in FPGA-based embedded systems starting from a high-level specification of data-flow networks. It uses CodeS- imulink as an environment for code generation. The asynchronous circuits are synthesized using conventional commercial tools and we propose solutions for the issues raised. Also we describe a simple way of simulating these designs.
This paper presents the architecture of a small university satellite that we have developed. The main design criteria were low cost and fault tolerance, which have been achieved by using commercial off the shelf components and by replicating all critical functions, while monitoring the state of the system for failures. The focus of the paper is on overall organization, design partitioning and details...
This paper presents a case study for high-level approach to mixed-systems co-design (analog, digital and software), which is based on UML as a high level system specification and description language. Aim of this paper is to demonstrate how UML specification can be easily translated into ANSI-C and VHDL using CodeSimulink co-design environment. This design flow is very suited to be a RAD (rapid application...
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