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IN this paper, various FinFETs with the different fin-width and gate-length were fabricated and characterised using SEM and cross-sectional STEM imaging. It was found that the standard deviations of the Vth of the pMOS and nMOS FinFETs are almost the same and the main Vth variation source was the work function variation of the TiN metal gate. Also, the on-current variation for TiN FinFETs was predominated...
A FinFET compact model, which provides physical representation of measurement data, was developed and was successfully applied to the characterization of sate-of-the-art metal-gate (MG) FinFETs. By combining the transistor size measurement and the model parameter calibration, the Vth variation of the MG FinFETs was analyzed into structure-based (TSi, LG) and material-based (gate work-function) variations...
The parasitic resistance of the FinFET is investigated by the measurement based analysis. The RS/D model suggests that careful optimization as to the NiSi incorporation is necessary for the effective Rp reduction. The Rext seriously increases the Rp for TfinLt25 nm and also causes the Rp variability due to the Tfin variation.
The logic gate threshold voltage controllable single metal gate FinFET CMOS inverter constructed by the 3T-PMOS and 4T-NMOS have successfully been fabricated. The accurate current matching and the logic gate threshold voltage tuning by Vg2 in the 4T-NMOS have been demonstrated. A higher WF metal would be more suitable for the proposed FinFET CMOS.
Dual metal gate CMOS FinFETs have been integrated successfully by the Ta/Mo interdiffusion technology. For the first time, low-Vt CMOS FinFETs representing on-current enhancement and high-Vt CMOS FinFETs reducing stand-by power dramatically, namely multi-Vt CMOS FinFETs, are demonstrated by selecting Ta/Mo gates for n or pMOS FinFETs with non-doped fin channels. The dual metal gate FinFET SRAM with...
An independent-gate four-terminal FinFET SRAM have been successfully fabricated for drastic leakage current reduction. The new SRAM is consisted of a four-terminal (4T-) FinFET which has a flexible Vth controllability. The 4T-FinFET with a TiN metal gate is fabricated by a newly developed gate separation etching process. By appropriately controlling the Vth of the 4T-FinFET, we have successfully demonstrated...
A Ta/Mo interdiffusion dual metal gate technology was successfully introduced to FinFET fabrication. The advantage of the proposed technology was examined by using the gate-first process without a metal-etch off step. The Ta/Mo gated nMOS FinFET with a reduced threshold voltage and the Mo gated pMOS FinFET exhibited symmetrical v alues of (0.31/0.36 V), which are desirable for the FinFET CMOS circuit...
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